From patchwork Tue May 21 16:01:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 1102906 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-501365-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 457gVb47Fpz9s5c for ; Wed, 22 May 2019 02:01:25 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:content-type; q= dns; s=default; b=cIlp6QJw7ucJZupghJnxERv309okYceq5SFdU982IB6LhD pqNgx7wTACIGEPZgKdUKmxwHEgwNofidUpILRRNRyB+dcrlt+ZYJnoOwjll/LDyC Mtsby4eryku0t12XlrmrgSrn4H2sBE5jFnJysYc8tJaotgX+rCS7qD957nlnY= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:content-type; s= default; bh=DJvnPUwS8epPqr9MEZN3uAWCBAA=; b=IRg6T9RLzk+1HIYueVob 2GLpENThEqv0t8ty8Yu/KKz+mJabQ5fZ31nVGy3cVhlNDiLt4APE6ZSGMSQwIY20 5Cu98kiQ6biOBA9DMdT7OSsSDX/NIXWP0D223+zvCImKXIeCYIV5htmr9KKdMleB bvKjR91ivc/0zx39s0Ps4QY= Received: (qmail 32219 invoked by alias); 21 May 2019 16:01:17 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 32211 invoked by uid 89); 21 May 2019 16:01:17 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-6.8 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_2, GIT_PATCH_3, KAM_ASCII_DIVIDERS, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.1 spammy=20f, ftreevectorize, ftree-vectorize X-HELO: mail-it1-f169.google.com Received: from mail-it1-f169.google.com (HELO mail-it1-f169.google.com) (209.85.166.169) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 21 May 2019 16:01:15 +0000 Received: by mail-it1-f169.google.com with SMTP id m141so1501832ita.3 for ; Tue, 21 May 2019 09:01:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:from:date:message-id:subject:to; bh=Xtu52ALKBoMhwUTO/Obntw3n3uYoDvmZk/4KRBS0Ot8=; b=P5NZixTXKDkzrCynn6Tc+JXoSQW64KmsRcgQtxVnpMxXl9My8iRxCozR85RPhsfj8S Fiu4AtZFmxxJJJuoxg+wyv2ZnZmp2SFg8SR5UpH/caEWty2D9o5O/hb8zQAfgV9k8Mie eMszNSk2/U0ylULZpAJ4ti2Lry/Ikj9PQ4RSSCvJzCO93qpjPJFTwplv/uIQIRAlJjcq LtTwt2ObtePtKcRzRcUtpkY1D/VkC5HYKd2VDVZJeH9ACFl8ihZ++hl4P53g/w0TN73n 5YrEeseWb7GYIdqRnG1jjDwM8HBG70+j+gc3h6tFbUdEqoALoy5wk69cxqjXfQFTrqMH 3MwQ== MIME-Version: 1.0 From: Uros Bizjak Date: Tue, 21 May 2019 18:01:01 +0200 Message-ID: Subject: [PATCH, i386]: Introduce signbit2 expander To: "gcc-patches@gcc.gnu.org" Based on the recent work that enabled vectorization of __builtin_signbit on aarch64. 2019-05-21 Uroš Bizjak * config/i386/sse.md (VF1_AVX2): New mode iterator. (signbit2): New expander testsuite/ChangeLog: 2019-05-21 Uroš Bizjak * gcc.target/i386/vect-signbitf.c: New test. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Committed to mainline SVN. Uros. Index: config/i386/sse.md =================================================================== --- config/i386/sse.md (revision 271467) +++ config/i386/sse.md (working copy) @@ -279,6 +279,9 @@ (define_mode_iterator VF1 [(V16SF "TARGET_AVX512F") (V8SF "TARGET_AVX") V4SF]) +(define_mode_iterator VF1_AVX2 + [(V16SF "TARGET_AVX512F") (V8SF "TARGET_AVX2") V4SF]) + ;; 128- and 256-bit SF vector modes (define_mode_iterator VF1_128_256 [(V8SF "TARGET_AVX") V4SF]) @@ -3523,6 +3526,15 @@ operands[4] = gen_reg_rtx (mode); }) +(define_expand "signbit2" + [(set (match_operand: 0 "register_operand") + (lshiftrt: + (subreg: + (match_operand:VF1_AVX2 1 "register_operand") 0) + (match_dup 2)))] + "TARGET_SSE2" + "operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (mode)-1);") + ;; Also define scalar versions. These are used for abs, neg, and ;; conditional move. Using subregs into vector modes causes register ;; allocation lossage. These patterns do not allow memory operands Index: testsuite/gcc.target/i386/vect-signbitf.c =================================================================== --- testsuite/gcc.target/i386/vect-signbitf.c (nonexistent) +++ testsuite/gcc.target/i386/vect-signbitf.c (working copy) @@ -0,0 +1,30 @@ +/* { dg-do run { target sse2_runtime } } */ +/* { dg-options "-O2 -msse2 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */ + +extern void abort (); + +#define N 1024 +float a[N] = {0.0f, -0.0f, 1.0f, -1.0f, + -2.0f, 3.0f, -5.0f, -8.0f, + 13.0f, 21.0f, -25.0f, 33.0f}; +int r[N]; + +int +main (void) +{ + int i; + + for (i = 0; i < N; i++) + r[i] = __builtin_signbitf (a[i]); + + /* check results: */ + for (i = 0; i < N; i++) + if (__builtin_signbit (a[i]) && !r[i]) + abort (); + + return 0; +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ +/* { dg-final { scan-assembler-not "-2147483648" } } */ +/* { dg-final { scan-assembler "psrld" } } */