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X-HELO: mail-vk0-f46.google.com Received: from mail-vk0-f46.google.com (HELO mail-vk0-f46.google.com) (209.85.213.46) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 04 Jul 2017 20:58:38 +0000 Received: by mail-vk0-f46.google.com with SMTP id y70so115249231vky.3 for ; Tue, 04 Jul 2017 13:58:38 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=txT+NIqrCWLLR6tGBlmjMfJndxJw+zZQJ5FGSPGdGeo=; b=kJT7RVtGS1lgHaS7XkyKmdEnW8QOOcUl5VEDJubSNAkp6Ze1GyI8fuvEeHE0laRJK2 Mkpg5KABHXMyJ+yX1QgRim5SaesY/mlhgclJDiNsXevlOOp3RWi/XdCD/P1PlFbZEJvM IuIG6PUvVTtcRpTXEwHLn2wohRjDCDZwOh+2pwAWa0otXCqsnf9NDySBxx7CfbfDVxFP BRbLtKvLTEsCqeg5fSOxmSFLzWxYHbr0187KNOkKSPoGqvOaHQF01CXRdhmHS/ie7s7u 95gNTfSMOl8bcuYNzRzA1wNHW+BWxm5PJnp/5POuylAai11xCTUlDTsK2+EdHjpKhYFu a+Jg== X-Gm-Message-State: AKS2vOz2Sigd/8Z2A2KfmHp9tkVuL5SGp91Nsu39RZW1GDt7NbvjNWPi Sy7XX0Xlg47+YKxxHfbjhlmJpGNfm1tl X-Received: by 10.31.94.2 with SMTP id s2mr22434366vkb.113.1499201916742; Tue, 04 Jul 2017 13:58:36 -0700 (PDT) MIME-Version: 1.0 Received: by 10.103.69.9 with HTTP; Tue, 4 Jul 2017 13:58:36 -0700 (PDT) From: Uros Bizjak Date: Tue, 4 Jul 2017 22:58:36 +0200 Message-ID: Subject: [PATCH, i386]: Fix PR 81300, -fpeephole2 breaks __builtin_ia32_sbb_u64, _subborrow_u64 on AMD64 To: "gcc-patches@gcc.gnu.org" Hello! Attached patch tightens peephole2 condition to prevent unwanted flags_reg clobbering by insn patterns, emitted by ix86_expand_clear. 2017-07-04 Uros Bizjak PR target/81300 * config/i386/i386.md (setcc + movzbl/and to xor + setcc peepholes): Require dead FLAGS_REG at the beginning of a peephole. testsuite/ChangeLog: 2017-07-04 Uros Bizjak PR target/81300 * gcc.target/i386/pr81300.c: New test. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Committed to mainline, will be backported to release branches. Uros. Index: config/i386/i386.md =================================================================== --- config/i386/i386.md (revision 249971) +++ config/i386/i386.md (working copy) @@ -11754,7 +11754,8 @@ (zero_extend (match_dup 1)))] "(peep2_reg_dead_p (3, operands[1]) || operands_match_p (operands[1], operands[3])) - && ! reg_overlap_mentioned_p (operands[3], operands[0])" + && ! reg_overlap_mentioned_p (operands[3], operands[0]) + && peep2_regno_dead_p (0, FLAGS_REG)" [(set (match_dup 4) (match_dup 0)) (set (strict_low_part (match_dup 5)) (match_dup 2))] @@ -11775,7 +11776,8 @@ "(peep2_reg_dead_p (3, operands[1]) || operands_match_p (operands[1], operands[3])) && ! reg_overlap_mentioned_p (operands[3], operands[0]) - && ! reg_set_p (operands[3], operands[4])" + && ! reg_set_p (operands[3], operands[4]) + && peep2_regno_dead_p (0, FLAGS_REG)" [(parallel [(set (match_dup 5) (match_dup 0)) (match_dup 4)]) (set (strict_low_part (match_dup 6)) @@ -11797,7 +11799,8 @@ (and:SI (match_dup 3) (const_int 255))) (clobber (reg:CC FLAGS_REG))])] "REGNO (operands[1]) == REGNO (operands[3]) - && ! reg_overlap_mentioned_p (operands[3], operands[0])" + && ! reg_overlap_mentioned_p (operands[3], operands[0]) + && peep2_regno_dead_p (0, FLAGS_REG)" [(set (match_dup 4) (match_dup 0)) (set (strict_low_part (match_dup 5)) (match_dup 2))] @@ -11819,7 +11822,8 @@ "(peep2_reg_dead_p (3, operands[1]) || operands_match_p (operands[1], operands[3])) && ! reg_overlap_mentioned_p (operands[3], operands[0]) - && ! reg_set_p (operands[3], operands[4])" + && ! reg_set_p (operands[3], operands[4]) + && peep2_regno_dead_p (0, FLAGS_REG)" [(parallel [(set (match_dup 5) (match_dup 0)) (match_dup 4)]) (set (strict_low_part (match_dup 6)) Index: testsuite/gcc.target/i386/pr81300.c =================================================================== --- testsuite/gcc.target/i386/pr81300.c (nonexistent) +++ testsuite/gcc.target/i386/pr81300.c (working copy) @@ -0,0 +1,30 @@ +/* PR target/81300 */ +/* { dg-do run { target { ! ia32 } } } */ +/* { dg-options "-O2" } */ + +int +__attribute__((noinline, noclone)) +foo (void) +{ + unsigned long long _discard = 0, zero = 0, maxull = 0; + unsigned char zero1 = __builtin_ia32_addcarryx_u64 (0, 0, 0, &_discard); + unsigned char zero2 = __builtin_ia32_addcarryx_u64 (zero1, 0, 0, &zero); + __builtin_ia32_sbb_u64 (0x0, 2, -1, &_discard); + unsigned char one = __builtin_ia32_sbb_u64 (0, zero, 1, &maxull); + unsigned long long x = __builtin_ia32_sbb_u64 (one, zero2, 0, &_discard); + + unsigned long long z1 = 0; + __asm__ ("mov{q}\t{%1, %0|%0, %1}" : "+r" (z1) : "r" (x)); + unsigned long long z2 = 3; + __asm__ ("mov{q}\t{%1, %0|%0, %1}" : "+r" (z2) : "r" (x)); + + return 1 - (z1 | z2); +} + +int main () +{ + if (foo ()) + __builtin_abort (); + + return 0; +}