From patchwork Mon Sep 16 18:43:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 1163042 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-509064-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="lZohr+Sy"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="WRINrByj"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46XFWr0St9z9sNw for ; Tue, 17 Sep 2019 04:44:05 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:content-type; q= dns; s=default; b=Toa5xOF1m+LiqHf55bN/QRNEnIXneVj67yPMaaVTLf3QIA ODjQ1582wNHyaIXXs6zQ3368yxpXHvL1/g54R9nce1QwjzUlcIlMU/HKAiNcOZiH Y92qFBu5xFPxnlV33rKGDrFZE22iXUNiFGqJdW4F5k94tUXVJoqhG7Mqghvjo= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:content-type; s= default; bh=t70t885o1DB8eE1eC/s9e2iv9sE=; b=lZohr+Sy5lyOfB+haqZu UK3IxXQpKZ5ZtyvoUNzUIl1viUjVbEwR1gBW4bujSg7pFUQkEopfY00aRq4hu+F0 0cDX0IBS6P6E6T3xkHtuydQ4ZpocIRe8xBZ+a7PtCtCnFIip0EH8PLpBeT0yGSam 7auYT/VbF18l6wggkDviTFo= Received: (qmail 37349 invoked by alias); 16 Sep 2019 18:43:57 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 37340 invoked by uid 89); 16 Sep 2019 18:43:57 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-7.4 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_2, GIT_PATCH_3, KAM_ASCII_DIVIDERS, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.1 spammy=ubizjak@gmail.com, ubizjakgmailcom, U*ubizjak, sk:ubizjak X-HELO: mail-io1-f45.google.com Received: from mail-io1-f45.google.com (HELO mail-io1-f45.google.com) (209.85.166.45) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 16 Sep 2019 18:43:55 +0000 Received: by mail-io1-f45.google.com with SMTP id q10so1532507iop.2 for ; Mon, 16 Sep 2019 11:43:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:from:date:message-id:subject:to; bh=iL61idS4Ox9v2V9JsGDbZSHt5E5hg+SEvcy9R4CJMKI=; b=WRINrByjphyndxIE004QrmD7fjfFsMeU7W6dYp/QsjFj4rdj8pWieEFpt7x00Ld6Y4 stQSmwvlLhGV+lzBXkCzfkxcwEMKp8X8JdNEGdaOVGJWBszv2nJdna0S+NKM5kSe/paK L5A/ElEafHS8yffT/DoMlux49nizpkZZgNFC48Rn+tOWP7iafE2wrCG716bgkYRqcHu8 woQaLrxh9HLzsfeJRyOTD3QCEilAFA1rw/bPU4RWuyrOVb+Phjp2Qqnt0CTYX8JVaih3 ISjm/LSwQbze4o3XDpIdlO39NqisPyVFSwGliQ9ZfhAaFUlGDEC2iY4iigE5HJxbo7dB kBpg== MIME-Version: 1.0 From: Uros Bizjak Date: Mon, 16 Sep 2019 20:43:42 +0200 Message-ID: Subject: [PATCH, i386]: Fix PR91719, emit XCHG for seq_cst store on big cores To: "gcc-patches@gcc.gnu.org" Attached patch emits XCHG instead of store+MFENCE on big cores and generic tuning m_CORE_ALL | m_BDVER | m_ZNVER | m_GENERIC (The tune can be added for other targets, too.) 2019-09-16 Uroš Bizjak PR target/91719 * config/i386/i386.h (TARGET_USE_XCHG_FOR_ATOMIC_STORE): New macro. * config/i386/x86-tune.def (X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE): New. * config/i386/sync.md (atomic_store): emit XCHG for TARGET_USE_XCHG_FOR_ATOMIC_STORE. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Committed to mainline SVN. Uros. Index: config/i386/i386.h =================================================================== --- config/i386/i386.h (revision 275752) +++ config/i386/i386.h (working copy) @@ -590,6 +590,8 @@ extern unsigned char ix86_tune_features[X86_TUNE_L ix86_tune_features[X86_TUNE_AVOID_FALSE_DEP_FOR_BMI] #define TARGET_ONE_IF_CONV_INSN \ ix86_tune_features[X86_TUNE_ONE_IF_CONV_INSN] +#define TARGET_USE_XCHG_FOR_ATOMIC_STORE \ + ix86_tune_features[X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE] #define TARGET_EMIT_VZEROUPPER \ ix86_tune_features[X86_TUNE_EMIT_VZEROUPPER] Index: config/i386/sync.md =================================================================== --- config/i386/sync.md (revision 275752) +++ config/i386/sync.md (working copy) @@ -306,8 +306,11 @@ { operands[1] = force_reg (mode, operands[1]); - /* For seq-cst stores, when we lack MFENCE, use XCHG. */ - if (is_mm_seq_cst (model) && !(TARGET_64BIT || TARGET_SSE2)) + /* For seq-cst stores, use XCHG + when we lack MFENCE or when target prefers XCHG. */ + if (is_mm_seq_cst (model) + && (!(TARGET_64BIT || TARGET_SSE2) + || TARGET_USE_XCHG_FOR_ATOMIC_STORE)) { emit_insn (gen_atomic_exchange (gen_reg_rtx (mode), operands[0], operands[1], Index: config/i386/x86-tune.def =================================================================== --- config/i386/x86-tune.def (revision 275752) +++ config/i386/x86-tune.def (working copy) @@ -313,6 +313,10 @@ DEF_TUNE (X86_TUNE_ONE_IF_CONV_INSN, "one_if_conv_ m_SILVERMONT | m_KNL | m_KNM | m_INTEL | m_CORE_ALL | m_GOLDMONT | m_GOLDMONT_PLUS | m_TREMONT | m_GENERIC) +/* X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE: Use xchg instead of mov+mfence. */ +DEF_TUNE (X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE, "use_xchg_for_atomic_store", + m_CORE_ALL | m_BDVER | m_ZNVER | m_GENERIC) + /*****************************************************************************/ /* 387 instruction selection tuning */ /*****************************************************************************/