From patchwork Sat Nov 26 10:51:34 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 127777 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 3A13AB708F for ; Sat, 26 Nov 2011 21:51:54 +1100 (EST) Received: (qmail 31269 invoked by alias); 26 Nov 2011 10:51:51 -0000 Received: (qmail 31261 invoked by uid 22791); 26 Nov 2011 10:51:50 -0000 X-SWARE-Spam-Status: No, hits=-2.3 required=5.0 tests=AWL, BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, TW_ZJ X-Spam-Check-By: sourceware.org Received: from mail-gx0-f175.google.com (HELO mail-gx0-f175.google.com) (209.85.161.175) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Sat, 26 Nov 2011 10:51:36 +0000 Received: by ggnl1 with SMTP id l1so1766680ggn.20 for ; Sat, 26 Nov 2011 02:51:35 -0800 (PST) MIME-Version: 1.0 Received: by 10.236.46.72 with SMTP id q48mr14738076yhb.80.1322304694108; Sat, 26 Nov 2011 02:51:34 -0800 (PST) Received: by 10.146.137.4 with HTTP; Sat, 26 Nov 2011 02:51:34 -0800 (PST) Date: Sat, 26 Nov 2011 11:51:34 +0100 Message-ID: Subject: [PATCH, i386]: Fix sync long long failures on 32bit x86 From: Uros Bizjak To: gcc-patches@gcc.gnu.org Cc: Richard Henderson , Andrew MacLeod Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org On Fri, Nov 25, 2011 at 8:31 PM, Uros Bizjak wrote: > However, the patch uncovers certain problems with existing fild/fistpl > implementation of atomic load/store. It fails in several of thread > simulation tests, i.e. > > FAIL: gcc.dg/simulate-thread/atomic-load-longlong.c  -O0 -g  thread > simulation test > > with: > > 1: x/i $pc > > => 0x8048582 : fild   -0x8(%ebp) > > 0x08048585      104           __atomic_store_n (&result, ret, __ATOMIC_SEQ_CST); > > 1: x/i $pc > > => 0x8048585 : fistp  0x8049ac0 > > 0x0804858b      104           __atomic_store_n (&result, ret, __ATOMIC_SEQ_CST); > > 1: x/i $pc > > => 0x804858b : lock orl $0x0,(%esp) > > FAIL: Invalid result returned from fetch At the end of the day, the problem was trivial, missing %Z suffix for fild and fistp instructions. Attached patch fixes all sync long long failures, including thread simulation tests. 2011-11-26 Uros Bizjak * config/i386/sync.md (movdi_via_fpu): Add %Z insn suffixes. Tested on x86_64-pc-linux-gnu {,-m32} and committed to mainline SVN. Uros. Index: sync.md =================================================================== --- sync.md (revision 181736) +++ sync.md (working copy) @@ -123,7 +123,7 @@ DONE; }) -;; ??? From volume 3 section 7.1.1 Guaranteed Atomic Operations, +;; ??? From volume 3 section 8.1.1 Guaranteed Atomic Operations, ;; Only beginning at Pentium family processors do we get any guarantee of ;; atomicity in aligned 64-bit quantities. Beginning at P6, we get a ;; guarantee for 64-bit accesses that do not cross a cacheline boundary. @@ -281,7 +281,7 @@ (unspec:DI [(match_operand:DI 1 "memory_operand" "m")] UNSPEC_MOVA)) (clobber (match_operand:DF 2 "register_operand" "=f"))] "TARGET_80387" - "fild\t%1\;fistp\t%0" + "fild%Z1\t%1\;fistp%Z0\t%0" [(set_attr "type" "multi") ;; Worst case based on full sib+offset32 addressing modes (set_attr "length" "14")])