From patchwork Thu Sep 19 17:21:46 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Charles Baylis X-Patchwork-Id: 276027 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 48D022C0110 for ; Fri, 20 Sep 2013 03:21:59 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:in-reply-to:references:date:message-id:subject :from:to:cc:content-type; q=dns; s=default; b=E3GfaaOu2k01e64Ghb GUMfpQA1P3B6ja715SUCy+TIVgJHmw7vg2LVkspfCvS9grftw7/4oQkhq0EF15f3 2FMZD919EE7bDHIV4lUJG/lpwp7Xl3TQebRTQT9ctktAUt7caH1jMn0ddqXMqxow iCPj+J+eUhzvfmZLU6CW8E15c= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:in-reply-to:references:date:message-id:subject :from:to:cc:content-type; s=default; bh=LkT+TqI4rI31BzZI5YTLR5SZ ssM=; b=nnF/bTfBOQWmmyGPS6hRQ0sf1fZiFtwypEvYAv9e6CqB+pDmNI7q2j+n tMi8Ob8V4df0+EwiCGquImtDGQFYxgd5UJr+0u0jfOnsULKQJq3zst6ahkUKdPR5 eWOlzUk3/7iSQgIs/TDdAoaQfNFtDzz/yRfhP6mufuyVTKhlmjo= Received: (qmail 14870 invoked by alias); 19 Sep 2013 17:21:52 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 14856 invoked by uid 89); 19 Sep 2013 17:21:51 -0000 Received: from mail-la0-f50.google.com (HELO mail-la0-f50.google.com) (209.85.215.50) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Thu, 19 Sep 2013 17:21:51 +0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-3.4 required=5.0 tests=BAYES_00, KHOP_THREADED, NO_RELAYS autolearn=ham version=3.3.2 X-HELO: mail-la0-f50.google.com Received: by mail-la0-f50.google.com with SMTP id gx14so2300294lab.9 for ; Thu, 19 Sep 2013 10:21:47 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=zQa4qK7kZYy40kF4kX817ZjpUHgWPf1LZDimMrNjGF4=; b=G8iFL7lJ0eXOO/q1Yc3SRt3SzaZsLmgKWuL2kJ2ySCsfToykCb0gFqwJVPuDQu4Gd/ DbQX8qkeY5BIfFWMUoEjzIBhxyC/mWNmJnKInZ5jdZpYy1sa03PB5jOSOz5QNtcQkvrl PSACYgvDIWyIb4XI4JBTConIQQXaV6mf8sSsbRo7iXI9vd/lwMMhE9hmJSoojzOS9/ZD pD50+mNtrx3Cnm7XO8g99wWn7uEUYDF+1PuCOdyXKCK5AgSeg15Yx6azA+WzhnOXPm0J vUA3+n8Y4R8OrvVLp8D4KDxDCHOTpdxns26yu5ohMih6oWr2+V1opuFrab6RKTGGXoA8 vo/w== X-Gm-Message-State: ALoCoQmIKMNl83Q51FgN6MdH02Ms5/pd2nU8aHYUAgMtTrrE4nwkBUxj+nw4pDvNgEaNmIiy/eM8 MIME-Version: 1.0 X-Received: by 10.112.128.166 with SMTP id np6mr2587284lbb.7.1379611306989; Thu, 19 Sep 2013 10:21:46 -0700 (PDT) Received: by 10.112.215.6 with HTTP; Thu, 19 Sep 2013 10:21:46 -0700 (PDT) In-Reply-To: <52123AF2.7020006@arm.com> References: <52123AF2.7020006@arm.com> Date: Thu, 19 Sep 2013 18:21:46 +0100 Message-ID: Subject: Re: [PATCH, ARM] fix testsuite failures for arm-none-linux-gnueabihf From: Charles Baylis To: Richard Earnshaw Cc: GCC Patches X-IsSubscribed: yes Hi Here is an updated version. Changelog: * gcc.dg/builtin-apply2.c: skip test on arm hardfloat ABI targets * gcc.dg/tls/pr42894.c: Remove options, forcing -mthumb fails with hardfloat, and test is not thumb-specific * gcc,target/arm/thumb-ltu.c: Avoid test failure with hardfloat ABI by requiring arm_thumb1_ok * lib/target-supports.exp (check_effective_target_arm_fp16_ok_nocache): don't force -mfloat-abi=soft when building for hardfloat target On 19 August 2013 16:34, Richard Earnshaw wrote: > On 15/08/13 15:10, Charles Baylis wrote: >> Hi >> >> The attached patch fixes some tests which fail when testing gcc for a >> arm-none-linux-gnueabihf target because they do not expect to be built >> with a hard float ABI. >> >> The change in target-supports.exp fixes arm-fp16-ops-5.c and arm-fp16-ops-6.c. >> >> Tested on arm-none-linux-gnueabihf using qemu-arm, and does not cause >> any other tests to break. >> >> Comments? This is my first patch, so please point out anything wrong. >> >> > >> >> >> 2013-08-15 Charles Baylis >> >> * gcc.dg/builtin-apply2.c: skip test on arm hardfloat ABI targets >> * gcc.dg/tls/pr42894.c: Use -mfloat-abi=soft as Thumb1 does >> not support hardfloat ABI >> * arm/thumb-ltu.c: Use -mfloat-abi=soft as Thumb1 does not >> support hardfloat ABI >> * target-supports.exp: don't force -mfloat-abi=soft when >> building for hardfloat target >> >> >> hf-fixes.txt >> >> >> Index: gcc/testsuite/gcc.dg/builtin-apply2.c >> =================================================================== >> --- gcc/testsuite/gcc.dg/builtin-apply2.c (revision 201726) >> +++ gcc/testsuite/gcc.dg/builtin-apply2.c (working copy) >> @@ -1,6 +1,7 @@ >> /* { dg-do run } */ >> /* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "aarch64*-*-* avr-*-* " } { "*" } { "" } } */ >> /* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { "arm*-*-*" } { "-mfloat-abi=hard" } { "" } } */ >> +/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { "arm*-*-gnueabihf" } { "*" } { "-mfloat-abi=soft*" } } */ >> > > > As you've noticed, basing the test's behaviour on the config variant > doesn't work reliably. The builtin-apply2 test really should be skipped > if the current test variant is not soft-float. We already have > check_effective_target_arm_hf_eabi in target-supports.exp that checks > whether __ARM_PCS_VFP is defined during a compilation. So can replace > both arm related lines in builtin-apply2 with > > /* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP > variant." { "arm*-*-*" && arm_hf_eabi} { "*" } { "" } } */ > >> /* PR target/12503 */ >> /* Origin: */ >> Index: gcc/testsuite/gcc.dg/tls/pr42894.c >> =================================================================== >> --- gcc/testsuite/gcc.dg/tls/pr42894.c (revision 201726) >> +++ gcc/testsuite/gcc.dg/tls/pr42894.c (working copy) >> @@ -1,6 +1,7 @@ >> /* PR target/42894 */ >> /* { dg-do compile } */ >> /* { dg-options "-march=armv5te -mthumb" { target arm*-*-* } } */ >> +/* { dg-options "-march=armv5te -mthumb -mfloat-abi=soft" { target arm*-*-*hf } } */ >> /* { dg-require-effective-target tls } */ >> > > Although the original PR was for Thumb1, this is a generic test. I'm > not convinced that on ARM it should try to force thumb1. Removing the > original dg-options line should solve the problem and we then get better > multi-lib testing as well. > >> extern __thread int t; >> Index: gcc/testsuite/gcc.target/arm/thumb-ltu.c >> =================================================================== >> --- gcc/testsuite/gcc.target/arm/thumb-ltu.c (revision 201726) >> +++ gcc/testsuite/gcc.target/arm/thumb-ltu.c (working copy) >> @@ -1,6 +1,6 @@ >> /* { dg-do compile } */ >> /* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "-march=armv6" "-march=armv6j" "-march=armv6z" } } */ >> -/* { dg-options "-mcpu=arm1136jf-s -mthumb -O2" } */ >> +/* { dg-options "-mcpu=arm1136jf-s -mthumb -O2 -mfloat-abi=soft" } */ >> > > This won't work if there's an explict -mfloat-abi={softfp,hard} on the > multilib options. Probably the best thing to do here is to skip the > test if arm_thumb1_ok is not true. > >> void f(unsigned a, unsigned b, unsigned c, unsigned d) >> { >> Index: gcc/testsuite/lib/target-supports.exp >> =================================================================== >> --- gcc/testsuite/lib/target-supports.exp (revision 201726) >> +++ gcc/testsuite/lib/target-supports.exp (working copy) >> @@ -2445,6 +2445,11 @@ >> # Must generate floating-point instructions. >> return 0 >> } >> + if [check-flags [list "" { *-*-gnueabihf } { "*" } { "" } ]] { >> + # Use existing float-abi and force an fpu which supports fp16 > > This should use arm_hf_eabi as described above. > >> + set et_arm_fp16_flags "-mfpu=vfpv4" >> + return 1; >> + } >> if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] { >> # The existing -mfpu value is OK; use it, but add softfp. >> set et_arm_fp16_flags "-mfloat-abi=softfp" >> > > Kyrill's comments re ChangeLogs also apply. > > R. > Index: gcc/testsuite/gcc.dg/builtin-apply2.c =================================================================== --- gcc/testsuite/gcc.dg/builtin-apply2.c (revision 202747) +++ gcc/testsuite/gcc.dg/builtin-apply2.c (working copy) @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "aarch64*-*-* avr-*-* " } { "*" } { "" } } */ -/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { "arm*-*-*" } { "-mfloat-abi=hard" } { "" } } */ +/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { arm*-*-* && arm_hf_eabi } { "*" } { "" } } */ /* PR target/12503 */ /* Origin: */ Index: gcc/testsuite/gcc.dg/tls/pr42894.c =================================================================== --- gcc/testsuite/gcc.dg/tls/pr42894.c (revision 202747) +++ gcc/testsuite/gcc.dg/tls/pr42894.c (working copy) @@ -1,6 +1,5 @@ /* PR target/42894 */ /* { dg-do compile } */ -/* { dg-options "-march=armv5te -mthumb" { target arm*-*-* } } */ /* { dg-require-effective-target tls } */ extern __thread int t; Index: gcc/testsuite/gcc.target/arm/thumb-ltu.c =================================================================== --- gcc/testsuite/gcc.target/arm/thumb-ltu.c (revision 202747) +++ gcc/testsuite/gcc.target/arm/thumb-ltu.c (working copy) @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "-march=armv6" "-march=armv6j" "-march=armv6z" } } */ +/* { dg-require-effective-target arm_thumb1_ok } */ /* { dg-options "-mcpu=arm1136jf-s -mthumb -O2" } */ void f(unsigned a, unsigned b, unsigned c, unsigned d) Index: gcc/testsuite/lib/target-supports.exp =================================================================== --- gcc/testsuite/lib/target-supports.exp (revision 202747) +++ gcc/testsuite/lib/target-supports.exp (working copy) @@ -2467,6 +2467,11 @@ # Must generate floating-point instructions. return 0 } + if [check_effective_target_arm_hf_eabi] { + # Use existing float-abi and force an fpu which supports fp16 + set et_arm_fp16_flags "-mfpu=vfpv4" + return 1; + } if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] { # The existing -mfpu value is OK; use it, but add softfp. set et_arm_fp16_flags "-mfloat-abi=softfp"