From patchwork Sun Oct 16 21:39:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Pinski X-Patchwork-Id: 682746 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3sxvr93Y7Pz9ry7 for ; Mon, 17 Oct 2016 08:39:50 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=qc+lrsKz; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:content-type; q= dns; s=default; b=CI8quJsXogmveRzOiDkXYr/MrrAiOd3VI6+2JkrfRzeNn/ On2HeEbw7tEIYPulbuk/c73+pY3Ww+EILQ9UUQuIKbAtr11fIG3PtXyKu9rhabyF Pq1GLN8A0zN6KXnyMH2LpKq+T3HJXJ/w+ysLlMny1a7um5FgXV4/blXy+3PQM= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:content-type; s= default; bh=6zNUt3HAL4RO5onzV+jZmaNw7yQ=; b=qc+lrsKz+O+9coL6VwFo NEjMdwLDWd24S32J82srZEu5IhUHuE5jjVnDMACpaxO6NBRb7hlUmNtUiy6qr3eT IGZ/I4bLWJ8THCfB+k9I0c7N6bzDcUDZv607eCzHY6LeYAXq3k8fLWzX89/jmy7K c6mzqrW29qnZDMhtmSd8cVc= Received: (qmail 121516 invoked by alias); 16 Oct 2016 21:39:41 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 120998 invoked by uid 89); 16 Oct 2016 21:39:41 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.7 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, KAM_ASCII_DIVIDERS, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=no version=3.3.2 spammy=tot, 7, 8 X-HELO: mail-yw0-f171.google.com Received: from mail-yw0-f171.google.com (HELO mail-yw0-f171.google.com) (209.85.161.171) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Sun, 16 Oct 2016 21:39:39 +0000 Received: by mail-yw0-f171.google.com with SMTP id u124so104405273ywg.3 for ; Sun, 16 Oct 2016 14:39:38 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=E4EFhDl+TqBDEgxnP0UDcNjKbEbgXCrvT01VlHJYyk0=; b=lwVdquGm/1Rww22sEbEZ6k/Cny+0Fg9sUcHZft/DCpBIa4FZZk4/MMHa6mUbnfc1aZ lq2Jl4JyHaTrCHNazQ5cRAdA1ZQm/VKnUg78fiJqMjgnJShkRA6ocuVE9bXNYm4SlHyT 3dxXfamEHVTs4z8NeGJLMMXr//S8YEE7xK2a1fIkl02ju/4v6cFRvq3vPi2LStrUgnn1 9nI+tA0KbaxHEmPPV/AFN0kW/OAKk+tmrHYwF2bmpVZfgZrF+M41I3V1xyzwGe1OnOcP BP6Rg5ZoMq/FPj0m77mqs6WCydJnDuAnrBoojp8pvwzfxg5Nw7fiVmuoicaSLEz5G1qN utPw== X-Gm-Message-State: AA6/9RmjtsYkJ++Hq8eQrY7ZIhdJ9cqh9yDQpXYzO2iDM8zvDBR9DVmwyScGglp8Sae1SCQ5LVfTn1lCQZHdEg== X-Received: by 10.129.105.196 with SMTP id e187mr19350414ywc.291.1476653977356; Sun, 16 Oct 2016 14:39:37 -0700 (PDT) MIME-Version: 1.0 Received: by 10.129.76.78 with HTTP; Sun, 16 Oct 2016 14:39:36 -0700 (PDT) From: Andrew Pinski Date: Sun, 16 Oct 2016 14:39:36 -0700 Message-ID: Subject: [PATCH/AARCH64] Fix some testcases for AARCH64 ILP32 To: GCC Patches X-IsSubscribed: yes Hi, These testcases use long for 64bit integer which means they will fail with -mabi=ilp32 on aarch64. This reduces the number of failures down for ILP32. OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions (including with a multi-lib for ilp32). Thanks, Andrew Pinski testsuite/ChangeLog: * gcc.dg/tree-ssa/sra-17.c: Use long long instead of long. * gcc.dg/tree-ssa/sra-18.c: Likewise. * gcc.target/aarch64/aapcs64/test_align-7.c: Likewise. * gcc.target/aarch64/cinc_common_1.c: Likewise. * gcc.target/aarch64/combine_bfi_1.c: Likewise. * gcc.target/aarch64/fmul_fcvt_1.c: Likewise. * gcc.target/aarch64/mult-synth_4.c: Likewise. * gcc.target/aarch64/pr68102_1.c: Likewise. * gcc.target/aarch64/target_attr_3.c: Likewise. Index: testsuite/gcc.dg/tree-ssa/sra-17.c =================================================================== --- testsuite/gcc.dg/tree-ssa/sra-17.c (revision 241217) +++ testsuite/gcc.dg/tree-ssa/sra-17.c (working copy) @@ -7,7 +7,7 @@ extern void abort (void); int main (int argc, char **argv) { - long a[4] = { 7, 19, 11, 255 }; + long long a[4] = { 7, 19, 11, 255 }; int tot = 0; for (int i = 0; i < 4; i++) tot = (tot*256) + a[i]; Index: testsuite/gcc.dg/tree-ssa/sra-18.c =================================================================== --- testsuite/gcc.dg/tree-ssa/sra-18.c (revision 241217) +++ testsuite/gcc.dg/tree-ssa/sra-18.c (working copy) @@ -3,7 +3,7 @@ /* { dg-additional-options "-mcpu=ev4" { target alpha*-*-* } } */ extern void abort (void); -struct foo { long x; }; +struct foo { long long x; }; struct bar { struct foo f[2]; }; Index: testsuite/gcc.target/aarch64/aapcs64/test_align-7.c =================================================================== --- testsuite/gcc.target/aarch64/aapcs64/test_align-7.c (revision 241217) +++ testsuite/gcc.target/aarch64/aapcs64/test_align-7.c (working copy) @@ -7,8 +7,8 @@ struct s { - long x; - long y; + long long x; + long long y; }; /* This still has size 16, so is still passed by value. */ Index: testsuite/gcc.target/aarch64/cinc_common_1.c =================================================================== --- testsuite/gcc.target/aarch64/cinc_common_1.c (revision 241217) +++ testsuite/gcc.target/aarch64/cinc_common_1.c (working copy) @@ -15,14 +15,14 @@ barsi (int x) return x > 100 ? x + 4 : x + 3; } -long -foodi (long x) +long long +foodi (long long x) { return x > 100 ? x - 2 : x - 1; } -long -bardi (long x) +long long +bardi (long long x) { return x > 100 ? x + 4 : x + 3; } Index: testsuite/gcc.target/aarch64/combine_bfi_1.c =================================================================== --- testsuite/gcc.target/aarch64/combine_bfi_1.c (revision 241217) +++ testsuite/gcc.target/aarch64/combine_bfi_1.c (working copy) @@ -25,8 +25,8 @@ f4 (int x, int y) return (x & ~0xff) | (y & 0xff); } -long -f5 (long x, long y) +long long +f5 (long long x, long long y) { return (x & ~0xffffffffull) | (y & 0xffffffff); } Index: testsuite/gcc.target/aarch64/fmul_fcvt_1.c =================================================================== --- testsuite/gcc.target/aarch64/fmul_fcvt_1.c (revision 241217) +++ testsuite/gcc.target/aarch64/fmul_fcvt_1.c (working copy) @@ -27,13 +27,13 @@ ulsffoo##__a (float x) \ } #define FUNC_DEFD(__a) \ -long \ +long long \ dffoo##__a (double x) \ { \ return x * __a##.0; \ } \ \ -unsigned long \ +unsigned long long \ udffoo##__a (double x) \ { \ return x * __a##.0; \ @@ -101,18 +101,18 @@ do \ __builtin_abort (); \ if (usffoo##__a (__b) != (unsigned int)(__b * __a)) \ __builtin_abort (); \ - if (lsffoo##__a (__b) != (long)(__b * __a)) \ + if (lsffoo##__a (__b) != (long long)(__b * __a)) \ __builtin_abort (); \ - if (ulsffoo##__a (__b) != (unsigned long)(__b * __a)) \ + if (ulsffoo##__a (__b) != (unsigned long long)(__b * __a)) \ __builtin_abort (); \ } while (0) #define FUNC_TESTD(__a, __b) \ do \ { \ - if (dffoo##__a (__b) != (long)(__b * __a)) \ + if (dffoo##__a (__b) != (long long)(__b * __a)) \ __builtin_abort (); \ - if (udffoo##__a (__b) != (unsigned long)(__b * __a)) \ + if (udffoo##__a (__b) != (unsigned long long)(__b * __a)) \ __builtin_abort (); \ if (sdffoo##__a (__b) != (int)(__b * __a)) \ __builtin_abort (); \ Index: testsuite/gcc.target/aarch64/mult-synth_4.c =================================================================== --- testsuite/gcc.target/aarch64/mult-synth_4.c (revision 241217) +++ testsuite/gcc.target/aarch64/mult-synth_4.c (working copy) @@ -1,10 +1,10 @@ /* { dg-do compile } */ /* { dg-options "-O2 -mcpu=cortex-a57 -save-temps" } */ -long +long long foo (int x, int y) { - return (long)x * 6L; + return (long long)x * 6LL; } /* { dg-final { scan-assembler-times "smull\tx\[0-9\]+, w\[0-9\]+, w\[0-9\]+" 1 } } */ Index: testsuite/gcc.target/aarch64/pr68102_1.c =================================================================== --- testsuite/gcc.target/aarch64/pr68102_1.c (revision 241217) +++ testsuite/gcc.target/aarch64/pr68102_1.c (working copy) @@ -3,7 +3,7 @@ typedef __Float64x1_t float64x1_t; -typedef long int64_t; +typedef long long int64_t; extern int64_t bar (float64x1_t f); Index: testsuite/gcc.target/aarch64/target_attr_3.c =================================================================== --- testsuite/gcc.target/aarch64/target_attr_3.c (revision 241217) +++ testsuite/gcc.target/aarch64/target_attr_3.c (working copy) @@ -5,12 +5,12 @@ and the fix is applied once. */ __attribute__ ((target ("fix-cortex-a53-835769"))) -unsigned long -test (unsigned long a, double b, unsigned long c, - unsigned long d, unsigned long *e) +unsigned long long +test (unsigned long long a, double b, unsigned long long c, + unsigned long long d, unsigned long long *e) { double result; - volatile unsigned long tmp = *e; + volatile unsigned long long tmp = *e; __asm__ __volatile ("// %0, %1" : "=w" (result) : "0" (b) @@ -18,12 +18,12 @@ test (unsigned long a, double b, unsigne return c * d + d; } -unsigned long -test2 (unsigned long a, double b, unsigned long c, - unsigned long d, unsigned long *e) +unsigned long long +test2 (unsigned long long a, double b, unsigned long long c, + unsigned long long d, unsigned long long *e) { double result; - volatile unsigned long tmp = *e; + volatile unsigned long long tmp = *e; __asm__ __volatile ("// %0, %1" : "=w" (result) : "0" (b)