From patchwork Thu Oct 6 22:49:44 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Pinski X-Patchwork-Id: 679116 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3sqnsq60pJz9s65 for ; Fri, 7 Oct 2016 09:50:05 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=DAP2Jhm9; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:content-type; q= dns; s=default; b=pGzMVB/6DrIdMayuM8/zxxzuSEYjNYPEiOYu1ElvHcHExx Eckaa/Ffl65fv52Y/0ysmdazXyiVfJRVZT4rvug6vyvKGPY8yVVOD5Y3zuF+VKHd ArpL2firAxLQlIvtUY6PoOmxrZxG1pjsYxOgyu6XXR9rbK9jQcj+44pMjYvbs= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:content-type; s= default; bh=/pRIZP2XJZAIrGcIfzhXpuPxB/w=; b=DAP2Jhm9p8KGpy8nAryN IMuzdHosrxOtiIi15b+XvdNcwbGm1Bz5RlwK9d1cr+5DaucF/lyD7HkxJrFsA/7j VkUR8IE7fgXNXVytxm5QxUqzvTb50s26dLW2oRDx3zdCwE9If07gB4oGiwpf6c5E rusqmCVz17Rnx57+YDRTM6s= Received: (qmail 111615 invoked by alias); 6 Oct 2016 22:49:58 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 111597 invoked by uid 89); 6 Oct 2016 22:49:57 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.4 required=5.0 tests=BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=no version=3.3.2 spammy=Samsung, AARCH64, Processors X-HELO: mail-yw0-f179.google.com Received: from mail-yw0-f179.google.com (HELO mail-yw0-f179.google.com) (209.85.161.179) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 06 Oct 2016 22:49:47 +0000 Received: by mail-yw0-f179.google.com with SMTP id t193so22158723ywc.2 for ; Thu, 06 Oct 2016 15:49:47 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=3yRyrMbMepSzG21TG5yt2DvFJca7BLNZMQzr+QbpPDw=; b=bc5OVAgNPVi7t91uNlAHnXJ402q7IIjn+G6pW8jpXaPQejp3Ego9/Q+XgVd4Xno3Rw Kxquu2CPHUDnaEoaqUJQoDqO2hJfkzy9U8S6skMLFIZMsAx+gS5JBR26xl2unYiqPbdw sR4TdNOkvVXdlcnObb0tut1DnAdNMmgafNhFejaBeeRcEv8DuADV70LvBdDJNQwxOG5G r7QNpuxcN8WQASbIE+OP8MRnkRUp64ccyFYC457hcDuRvGcu2a/xfEO017Si1TSrxv3n nKCMZ98D69kO9Bhqn5k+FYv4Yo3OKOMBtwWj4X27zdTe2WRzdq8yuuuHa+dl8G2mPhY7 ohaw== X-Gm-Message-State: AA6/9Rnnma95XnrbPwkXBObk6XtrvYAo0hGc/hWTnq95chZze4X6E1xOai9pUN3IO0EI8MGmDBwMlbUxy2C+0g== X-Received: by 10.13.238.6 with SMTP id x6mr13828660ywe.212.1475794185423; Thu, 06 Oct 2016 15:49:45 -0700 (PDT) MIME-Version: 1.0 Received: by 10.129.76.78 with HTTP; Thu, 6 Oct 2016 15:49:44 -0700 (PDT) From: Andrew Pinski Date: Thu, 6 Oct 2016 15:49:44 -0700 Message-ID: Subject: [Committed/AARCH64] Add comment before each set of cores in aarch64-cores.def To: GCC Patches X-IsSubscribed: yes Like https://gcc.gnu.org/ml/gcc-patches/2015-11/msg02145.html but updated for the new cores that were added and add the character which represents the implementors. Committed as obvious after a bootstrap and test. Thanks, Andrew * config/aarch64/aarch64-cores.def: Add a comment before each set of cores. Index: config/aarch64/aarch64-cores.def =================================================================== --- config/aarch64/aarch64-cores.def (revision 240845) +++ config/aarch64/aarch64-cores.def (working copy) @@ -40,18 +40,28 @@ /* V8 Architecture Processors. */ +/* ARM ('A') cores. */ AARCH64_CORE("cortex-a35", cortexa35, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa35, "0x41", "0xd04") AARCH64_CORE("cortex-a53", cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa53, "0x41", "0xd03") AARCH64_CORE("cortex-a57", cortexa57, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, "0x41", "0xd07") AARCH64_CORE("cortex-a72", cortexa72, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa72, "0x41", "0xd08") AARCH64_CORE("cortex-a73", cortexa73, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa73, "0x41", "0xd09") + +/* Samsung ('S') cores. */ AARCH64_CORE("exynos-m1", exynosm1, exynosm1, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, exynosm1, "0x53", "0x001") + +/* Qualcomm ('Q') cores. */ AARCH64_CORE("qdf24xx", qdf24xx, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, qdf24xx, "0x51", "0x800") + +/* Cavium ('C') cores. */ AARCH64_CORE("thunderx", thunderx, thunderx, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx, "0x43", "0x0a1") + +/* APM ('P') cores. */ AARCH64_CORE("xgene1", xgene1, xgene1, 8A, AARCH64_FL_FOR_ARCH8, xgene1, "0x50", "0x000") /* V8.1 Architecture Processors. */ +/* Broadcom ('B') cores. */ AARCH64_CORE("vulcan", vulcan, cortexa57, 8_1A, AARCH64_FL_FOR_ARCH8_1 | AARCH64_FL_CRYPTO, vulcan, "0x42", "0x516") /* V8 big.LITTLE implementations. */