| Message ID | CA+=Sn1=Q3n6qt9iihYKwzJby2DK5JZNp1tOpWB0X+DQef4a++w@mail.gmail.com |
|---|---|
| State | New |
| Headers | show |
Index: testsuite/gcc.target/aarch64/atomic_cmp_exchange_zero_reg_1.c =================================================================== --- testsuite/gcc.target/aarch64/atomic_cmp_exchange_zero_reg_1.c (revision 250901) +++ testsuite/gcc.target/aarch64/atomic_cmp_exchange_zero_reg_1.c (working copy) @@ -1,5 +1,6 @@ /* { dg-do compile } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -march=armv8-a+nolse" } */ +/* { dg-skip-if "" { *-*-* } { "-mcpu=*" } { "" } } */ int foo (int *a) Index: testsuite/gcc.target/aarch64/atomic_cmp_exchange_zero_strong_1.c =================================================================== --- testsuite/gcc.target/aarch64/atomic_cmp_exchange_zero_strong_1.c (revision 250901) +++ testsuite/gcc.target/aarch64/atomic_cmp_exchange_zero_strong_1.c (working copy) @@ -1,5 +1,6 @@ /* { dg-do compile } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -march=armv8-a+nolse" } */ +/* { dg-skip-if "" { *-*-* } { "-mcpu=*" } { "" } } */ int foo (int *a)
Hi, This test fails if you supply a -mcpu= (or -march) option which enables LSE (or when you default to having LSE turned on). This fixes that by supplying -march=armv8.1-a+nolse and skips if you pass a -mcpu option. Committed as obvious after testing on aarch64-linux-gnu with --target_board=unix/\{,-mcpu=thunderx,-mcpu=thunderx2t99,-march=armv8-a,-march=armv8.1-a,-march=armv8.2-a\}. Thanks, Andrew Pinski ChangeLog: * gcc.target/aarch64/atomic_cmp_exchange_zero_reg_1.c: Pass -march=armv8-a+nolse, skip if -mcpu= is passed. * gcc.target/aarch64/atomic_cmp_exchange_zero_strong_1.c: Likewise.