From patchwork Wed Jun 1 17:27:59 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramana Radhakrishnan X-Patchwork-Id: 98227 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 4ED41B6F93 for ; Thu, 2 Jun 2011 03:28:16 +1000 (EST) Received: (qmail 27154 invoked by alias); 1 Jun 2011 17:28:15 -0000 Received: (qmail 27146 invoked by uid 22791); 1 Jun 2011 17:28:14 -0000 X-SWARE-Spam-Status: No, hits=-2.6 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, TW_VB X-Spam-Check-By: sourceware.org Received: from mail-qy0-f175.google.com (HELO mail-qy0-f175.google.com) (209.85.216.175) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 01 Jun 2011 17:28:00 +0000 Received: by qyk35 with SMTP id 35so2023546qyk.20 for ; Wed, 01 Jun 2011 10:27:59 -0700 (PDT) MIME-Version: 1.0 Received: by 10.224.104.141 with SMTP id p13mr5363535qao.128.1306949279638; Wed, 01 Jun 2011 10:27:59 -0700 (PDT) Received: by 10.224.61.5 with HTTP; Wed, 1 Jun 2011 10:27:59 -0700 (PDT) Date: Wed, 1 Jun 2011 18:27:59 +0100 Message-ID: Subject: [Patch ARM] Unbreak bootstrap for --with-fpu=neon. From: Ramana Radhakrishnan To: gcc-patches@gcc.gnu.org Cc: Patch Tracking , Michael Hope X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hi, It turns out that my effort last week in canonicalizing the vbic and the vorn patterns in the neon bug exposed a latent bug while bootstrapping trunk with Neon which Michael's tester picked up.. The splitting is slightly tricky because in T2 state you've got the orn instruction but in ARM state you don't . I intend to follow this up with a separate patch that turns some of these patterns off on the A8 in line with the other patches that have come in recently to do. Before doing that I also need to reorganize the arch attributes a bit and move the a8 and nota8 bits into a separate attribute - so that's the matter of another patch. Verified that the compiler passes bootstrap in both ARM and Thumb2 states . Regression tests are still running. It will be committed after tests finish. cheers Ramana 2011-05-31 Ramana Radhakrishnan * config/arm/neon.md (orndi3_neon): Actually split it. Index: gcc/config/arm/neon.md =================================================================== --- gcc/config/arm/neon.md (revision 174266) +++ gcc/config/arm/neon.md (working copy) @@ -801,17 +801,44 @@ [(set_attr "neon_type" "neon_int_1")] ) -(define_insn "orndi3_neon" - [(set (match_operand:DI 0 "s_register_operand" "=w,?=&r,?&r") - (ior:DI (not:DI (match_operand:DI 2 "s_register_operand" "w,0,r")) - (match_operand:DI 1 "s_register_operand" "w,r,0")))] +;; TODO: investigate whether we should disable +;; this and bicdi3_neon for the A8 in line with the other +;; changes above. +(define_insn_and_split "orndi3_neon" + [(set (match_operand:DI 0 "s_register_operand" "=w,?=&r,?=&r,?&r") + (ior:DI (not:DI (match_operand:DI 2 "s_register_operand" "w,0,0,r")) + (match_operand:DI 1 "s_register_operand" "w,r,r,0")))] "TARGET_NEON" "@ vorn\t%P0, %P1, %P2 # + # #" - [(set_attr "neon_type" "neon_int_1,*,*") - (set_attr "length" "*,8,8")] + "reload_completed && + (TARGET_NEON && !(IS_VFP_REGNUM (REGNO (operands[0]))))" + [(set (match_dup 0) (ior:SI (not:SI (match_dup 2)) (match_dup 1))) + (set (match_dup 3) (ior:SI (not:SI (match_dup 4)) (match_dup 5)))] + " + { + if (TARGET_THUMB2) + { + operands[3] = gen_highpart (SImode, operands[0]); + operands[0] = gen_lowpart (SImode, operands[0]); + operands[4] = gen_highpart (SImode, operands[2]); + operands[2] = gen_lowpart (SImode, operands[2]); + operands[5] = gen_highpart (SImode, operands[1]); + operands[1] = gen_lowpart (SImode, operands[1]); + } + else + { + emit_insn (gen_one_cmpldi2 (operands[0], operands[2])); + emit_insn (gen_iordi3 (operands[0], operands[1], operands[0])); + DONE; + } + }" + [(set_attr "neon_type" "neon_int_1,*,*,*") + (set_attr "length" "*,16,8,8") + (set_attr "arch" "any,a,t2,t2")] ) (define_insn "bic3_neon"