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[committed] amdgcn: adjust testsuite

Message ID 9df3b0a4-a0e5-1123-c881-544f71d6c058@codesourcery.com
State New
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Series [committed] amdgcn: adjust testsuite | expand

Commit Message

Andrew Stubbs March 25, 2020, 9:11 p.m. UTC 
This adjusts the testsuite expectations for amdgcn. This reflects some 
of the recent improvements to the backend.

There's one new failure because GCN can't vectorize division natively 
(and there's no libgcc routine yet), but there's 24 fails turned to passes.

Andrew
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Patch

testsuite: adjustments for amdgcn

2020-03-25  Andrew Stubbs  <ams@codesourcery.com>

	gcc/testsuite/
	* gcc.dg/vect/bb-slp-pr69907.c: Disable the dump scan for amdgcn.
	* lib/target-supports.exp (check_effective_target_vect_unpack):
	Add amdgcn.

diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-pr69907.c b/gcc/testsuite/gcc.dg/vect/bb-slp-pr69907.c
index 813b1af089a..fe52d18525a 100644
--- a/gcc/testsuite/gcc.dg/vect/bb-slp-pr69907.c
+++ b/gcc/testsuite/gcc.dg/vect/bb-slp-pr69907.c
@@ -19,5 +19,6 @@  void foo(unsigned *p1, unsigned short *p2)
 
 /* Disable for SVE because for long or variable-length vectors we don't
    get an unrolled epilogue loop.  Also disable for AArch64 Advanced SIMD,
-   because there we can vectorize the epilogue using mixed vector sizes.  */
-/* { dg-final { scan-tree-dump "BB vectorization with gaps at the end of a load is not supported" "slp1" { target { ! aarch64*-*-* } } } } */
+   because there we can vectorize the epilogue using mixed vector sizes.
+   Likewise for AMD GCN.  */
+/* { dg-final { scan-tree-dump "BB vectorization with gaps at the end of a load is not supported" "slp1" { target { { ! aarch64*-*-* } && { ! amdgcn*-*-* } } } } } */
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 10353af580a..3654e7bc232 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -6717,7 +6717,8 @@  proc check_effective_target_vect_unpack { } {
              || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
 		 && [check_effective_target_arm_little_endian])
 	     || ([istarget s390*-*-*]
-		 && [check_effective_target_s390_vx]) }}]
+		 && [check_effective_target_s390_vx])
+	     || [istarget amdgcn*-*-*] }}]
 }
 
 # Return 1 if the target plus current options does not guarantee