From patchwork Tue Jul 4 13:55:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Preudhomme X-Patchwork-Id: 783982 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3x25Bl3pJcz9t2H for ; Tue, 4 Jul 2017 23:56:15 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="lrpKgNIY"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:from:to:references:message-id:date:mime-version :in-reply-to:content-type; q=dns; s=default; b=RTG3dA4F5rW0IOKmt hVLu0MhlGhLo9U/PzA/EpuHXA6fu+9ys892DbmX0hjHveorvOmJUVo0IGzrR5Uyg cJEEi2CNw7MxZj3p6eciGgEWuhVtnGFk7CfBpfg9uVa0rDu6rrK0kAM83oyFc8C5 ZVvJeI6ON3fEl1JKdqlqIr3KJ0= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:from:to:references:message-id:date:mime-version :in-reply-to:content-type; s=default; bh=R8R1ZkmtoSa5TwvUAXSwa5A NKRA=; b=lrpKgNIYQErtt0/uerd5X3hXFYQz+vswd8shV+BTIDgoLe6BRrcqCfW EfYsG/4EajmUih+HnX1n+9epOYB4kLYcSxxpkjzp9rqs9KdvrEftnOHjSZdsv+JZ 4B4sCHjc/hIruugvqfWGvcYdkZdzaq+dBfGNDGYE+2yjgdPJiES8= Received: (qmail 37908 invoked by alias); 4 Jul 2017 13:56:06 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 37888 invoked by uid 89); 4 Jul 2017 13:56:04 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY, RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=Hx-languages-length:1218, Best X-HELO: foss.arm.com Received: from usa-sjc-mx-foss1.foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 04 Jul 2017 13:56:03 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AE4BA2B; Tue, 4 Jul 2017 06:56:01 -0700 (PDT) Received: from [10.2.206.52] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EC4B83F557; Tue, 4 Jul 2017 06:56:00 -0700 (PDT) Subject: Re: [PATCH 1/3, GCC/ARM, ping] Add MIDR info for ARM Cortex-R7 and Cortex-R8 From: Thomas Preudhomme To: Kyrill Tkachov , Ramana Radhakrishnan , Richard Earnshaw , "gcc-patches@gcc.gnu.org" References: <9ab04ae2-a65a-11cc-dfaf-1a20a8137e4e@foss.arm.com> Message-ID: <88ba1e93-952e-0759-9bca-ad120fff18f4@foss.arm.com> Date: Tue, 4 Jul 2017 14:55:59 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.1.1 MIME-Version: 1.0 In-Reply-To: X-IsSubscribed: yes Ping? Best regards, Thomas On 29/06/17 14:55, Thomas Preudhomme wrote: > Hi, > > The driver is missing MIDR information for processors ARM Cortex-R7 and > Cortex-R8 to support -march/-mcpu/-mtune=native on the command line. > This patch adds the missing information. > > ChangeLog entry is as follows: > > *** gcc/ChangeLog *** > > 2017-01-31 Thomas Preud'homme > > * config/arm/driver-arm.c (arm_cpu_table): Add entry for ARM > Cortex-R7 and Cortex-R8 processors. > > Is this ok for master? > > Best regards, > > Thomas diff --git a/gcc/config/arm/driver-arm.c b/gcc/config/arm/driver-arm.c index b034f13fda63f5892bbd9879d72f4b02e2632d69..29873d57a1e45fd989f6ff01dd4a2ae7320d93bb 100644 --- a/gcc/config/arm/driver-arm.c +++ b/gcc/config/arm/driver-arm.c @@ -54,6 +54,8 @@ static struct vendor_cpu arm_cpu_table[] = { {"0xd09", "armv8-a+crc", "cortex-a73"}, {"0xc14", "armv7-r", "cortex-r4"}, {"0xc15", "armv7-r", "cortex-r5"}, + {"0xc17", "armv7-r", "cortex-r7"}, + {"0xc18", "armv7-r", "cortex-r8"}, {"0xc20", "armv6-m", "cortex-m0"}, {"0xc21", "armv6-m", "cortex-m1"}, {"0xc23", "armv7-m", "cortex-m3"},