From patchwork Mon Sep 5 19:43:47 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 113435 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 89025B6F76 for ; Tue, 6 Sep 2011 05:44:18 +1000 (EST) Received: (qmail 2838 invoked by alias); 5 Sep 2011 19:44:17 -0000 Received: (qmail 2821 invoked by uid 22791); 5 Sep 2011 19:44:12 -0000 X-SWARE-Spam-Status: No, hits=-1.5 required=5.0 tests=AWL, BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, KAM_STOCKGEN, RCVD_IN_DNSWL_LOW, TW_MG, TW_YG, T_TO_NO_BRKTS_FREEMAIL X-Spam-Check-By: sourceware.org Received: from mail-ww0-f51.google.com (HELO mail-ww0-f51.google.com) (74.125.82.51) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 05 Sep 2011 19:43:53 +0000 Received: by wwi18 with SMTP id 18so4820358wwi.8 for ; Mon, 05 Sep 2011 12:43:51 -0700 (PDT) Received: by 10.216.220.139 with SMTP id o11mr2791466wep.59.1315251831161; Mon, 05 Sep 2011 12:43:51 -0700 (PDT) Received: from localhost (rsandifo.gotadsl.co.uk [82.133.89.107]) by mx.google.com with ESMTPS id l13sm9275720wbp.20.2011.09.05.12.43.48 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 05 Sep 2011 12:43:50 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, rdsandiford@googlemail.com Subject: [MIPS, committed] Fix PR49606: ICE from -mabi=o64 -mlong64 -mabicalls Date: Mon, 05 Sep 2011 20:43:47 +0100 Message-ID: <87r53uepvw.fsf@firetop.home> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/23.2 (gnu/linux) MIME-Version: 1.0 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org PR 49606 is about an ICE when using the combination of -mabi=o64 -mlong64 -mabicalls. In the PR I claimed that -mabi=o64 -mlong64 is an unsupported combination, and that this bug was therefore a missing diagnostic bug. However, it seems that in more naive days I'd explicitly OKed the non-abicalls form: http://gcc.gnu.org/ml/gcc-patches/2006-06/msg00609.html That combination is also used by t-sr71k. I think -mabi=o64 -mlong64 really doesn't make sense for abicalls though, because ELF32 produces 32-bit GOT entries. This patch goes for a belt-and-braces fix. It replaces all patterns that assume Pmode == SImode with a :P version. Although this might not strictly be necessary, I think it makes the code more consistent. The patch also adds a PMODE_INSN macro to make these Pmode insns easier to handle. But the patch also rejects ABI combinations that don't make sense: they aren't defined, and even if they compile, they're likely to be mishandled by the assembler, linker, or runtime. I've added some smoke tests for every interesting ABI combination, and error checks for the invalid combinations. Tested on mipsisa32-elf and applied. Richard gcc/ PR target/49606 * config/mips/mips.h (ABI_HAS_64BIT_SYMBOLS): Check Pmode. (PMODE_INSN): New macro. * config/mips/mips.c (gen_load_const_gp): Use PMODE_INSN. (mips_got_load, mips_expand_synci_loop): Likewise. (mips_save_gp_to_cprestore_slot): Handle SImode and DImode cprestore patterns. (mips_emit_loadgp): Use PMODE_INSN. Handle SImode and DImode copygp_mips16 patterns. (mips_expand_prologue): Handle SImode and DImode potential_cprestore and use_cprestore patterns. (mips_override_options): Check for incompatible -mabi and -mlong combinations. * config/mips/mips.md (unspec_got): Rename to... (unspec_got_): ...this. (copygp_mips16): Use the Pmode iterator. (potential_cprestore, cprestore, use_cprestore): Likewise. (clear_cache, indirect_jump): Use PMODE_INSN. (indirect_jump): Rename to... (indirect_jump_): ...this. (tablejump): Use PMODE_INSN. (tablejump): Rename to... (tablejump_): ...this. (exception_receiver): Handle restore_gp_si and restore_gp_di. (restore_gp): Use the Pmode iterator. * config/mips/mips-dsp.md (mips_lbux, mips_lhx, mips_lwx): Use PMODE_INSN. gcc/testsuite/ PR target/49606 * gcc.target/mips/abi-main.h: New file. * gcc.target/mips/abi-o32-long32.c: New test. * gcc.target/mips/abi-o32-long64.c: Likewise. * gcc.target/mips/abi-o64-long32.c: Likewise. * gcc.target/mips/abi-o64-long64.c: Likewise. * gcc.target/mips/abi-n32-long32.c: Likewise. * gcc.target/mips/abi-n32-long64.c: Likewise. * gcc.target/mips/abi-n64-long32.c: Likewise. * gcc.target/mips/abi-n64-long64.c: Likewise. * gcc.target/mips/abi-o32-long32-no-shared.c: Likewise. * gcc.target/mips/abi-o32-long64-no-shared.c: Likewise. * gcc.target/mips/abi-o64-long32-no-shared.c: Likewise. * gcc.target/mips/abi-o64-long64-no-shared.c: Likewise. * gcc.target/mips/abi-n32-long32-no-shared.c: Likewise. * gcc.target/mips/abi-n32-long64-no-shared.c: Likewise. * gcc.target/mips/abi-n64-long32-no-shared.c: Likewise. * gcc.target/mips/abi-n64-long64-no-shared.c: Likewise. * gcc.target/mips/abi-o32-long32-pic.c: Likewise. * gcc.target/mips/abi-o32-long64-pic.c: Likewise. * gcc.target/mips/abi-o64-long32-pic.c: Likewise. * gcc.target/mips/abi-o64-long64-pic.c: Likewise. * gcc.target/mips/abi-n32-long32-pic.c: Likewise. * gcc.target/mips/abi-n32-long64-pic.c: Likewise. * gcc.target/mips/abi-n64-long32-pic.c: Likewise. * gcc.target/mips/abi-n64-long64-pic.c: Likewise. * gcc.target/mips/abi-eabi32-long32.c: Likewise. * gcc.target/mips/abi-eabi32-long64.c: Likewise. * gcc.target/mips/abi-eabi64-long32.c: Likewise. * gcc.target/mips/abi-eabi64-long64.c: Likewise. * gcc.target/mips/mips.exp: Make -mshared implied -mabicalls. * gcc.target/mips/branch-2.c: Remove -mabicalls. * gcc.target/mips/branch-3.c: Likewise. * gcc.target/mips/branch-4.c: Likewise. * gcc.target/mips/branch-5.c: Likewise. * gcc.target/mips/branch-6.c: Likewise. * gcc.target/mips/branch-7.c: Likewise. * gcc.target/mips/branch-8.c: Likewise. * gcc.target/mips/branch-9.c: Likewise. * gcc.target/mips/branch-10.c: Likewise. * gcc.target/mips/branch-11.c: Likewise. * gcc.target/mips/branch-12.c: Likewise. * gcc.target/mips/branch-13.c: Likewise. * gcc.target/mips/lazy-binding-1.c: Likewise. Index: gcc/config/mips/mips.h =================================================================== --- gcc/config/mips/mips.h 2011-09-04 12:41:37.000000000 +0100 +++ gcc/config/mips/mips.h 2011-09-04 16:28:31.000000000 +0100 @@ -792,7 +792,9 @@ #define FILE_HAS_64BIT_SYMBOLS (mips_abi the ABI's file format, but it can be overridden by -msym32. Note that overriding the size with -msym32 changes the ABI of relocatable objects, although it doesn't change the ABI of a fully-linked object. */ -#define ABI_HAS_64BIT_SYMBOLS (FILE_HAS_64BIT_SYMBOLS && !TARGET_SYM32) +#define ABI_HAS_64BIT_SYMBOLS (FILE_HAS_64BIT_SYMBOLS \ + && Pmode == DImode \ + && !TARGET_SYM32) /* ISA has instructions for managing 64-bit fp and gp regs (e.g. mips3). */ #define ISA_HAS_64BIT_REGS (ISA_MIPS3 \ @@ -2916,3 +2918,10 @@ #define ASM_PREFERRED_EH_DATA_FORMAT(COD /* For switching between MIPS16 and non-MIPS16 modes. */ #define SWITCHABLE_TARGET 1 + +/* Several named MIPS patterns depend on Pmode. These patterns have the + form _si for Pmode == SImode and _di for Pmode == DImode. + Add the appropriate suffix to generator function NAME and invoke it + with arguments ARGS. */ +#define PMODE_INSN(NAME, ARGS) \ + (Pmode == SImode ? NAME ## _si ARGS : NAME ## _di ARGS) Index: gcc/config/mips/mips.c =================================================================== --- gcc/config/mips/mips.c 2011-09-04 12:41:45.000000000 +0100 +++ gcc/config/mips/mips.c 2011-09-05 20:23:35.000000000 +0100 @@ -2522,9 +2522,7 @@ mips_unspec_offset_high (rtx temp, rtx b static rtx gen_load_const_gp (rtx reg) { - return (Pmode == SImode - ? gen_load_const_gp_si (reg) - : gen_load_const_gp_di (reg)); + return PMODE_INSN (gen_load_const_gp, (reg)); } /* Return a pseudo register that contains the value of $gp throughout @@ -2626,9 +2624,7 @@ mips_got_load (rtx temp, rtx addr, enum if (type == SYMBOL_GOTOFF_CALL) return mips_unspec_call (high, lo_sum_symbol); else - return (Pmode == SImode - ? gen_unspec_gotsi (high, lo_sum_symbol) - : gen_unspec_gotdi (high, lo_sum_symbol)); + return PMODE_INSN (gen_unspec_got, (high, lo_sum_symbol)); } /* If MODE is MAX_MACHINE_MODE, ADDR appears as a move operand, otherwise @@ -6676,9 +6672,7 @@ mips_expand_synci_loop (rtx begin, rtx e /* Load INC with the cache line size (rdhwr INC,$1). */ inc = gen_reg_rtx (Pmode); - emit_insn (Pmode == SImode - ? gen_rdhwr_synci_step_si (inc) - : gen_rdhwr_synci_step_di (inc)); + emit_insn (PMODE_INSN (gen_rdhwr_synci_step, (inc))); /* Check if inc is 0. */ cmp_result = gen_rtx_EQ (VOIDmode, inc, const0_rtx); @@ -9526,7 +9520,7 @@ mips_save_gp_to_cprestore_slot (rtx mem, if (TARGET_CPRESTORE_DIRECTIVE) { gcc_assert (gp == pic_offset_table_rtx); - emit_insn (gen_cprestore (mem, offset)); + emit_insn (PMODE_INSN (gen_cprestore, (mem, offset))); } else mips_emit_move (mips_cprestore_slot (temp, false), gp); @@ -9913,9 +9907,8 @@ mips_emit_loadgp (void) mips_gnu_local_gp = gen_rtx_SYMBOL_REF (Pmode, "__gnu_local_gp"); SYMBOL_REF_FLAGS (mips_gnu_local_gp) |= SYMBOL_FLAG_LOCAL; } - emit_insn (Pmode == SImode - ? gen_loadgp_absolute_si (pic_reg, mips_gnu_local_gp) - : gen_loadgp_absolute_di (pic_reg, mips_gnu_local_gp)); + emit_insn (PMODE_INSN (gen_loadgp_absolute, + (pic_reg, mips_gnu_local_gp))); break; case LOADGP_OLDABI: @@ -9926,17 +9919,14 @@ mips_emit_loadgp (void) addr = XEXP (DECL_RTL (current_function_decl), 0); offset = mips_unspec_address (addr, SYMBOL_GOTOFF_LOADGP); incoming_address = gen_rtx_REG (Pmode, PIC_FUNCTION_ADDR_REGNUM); - emit_insn (Pmode == SImode - ? gen_loadgp_newabi_si (pic_reg, offset, incoming_address) - : gen_loadgp_newabi_di (pic_reg, offset, incoming_address)); + emit_insn (PMODE_INSN (gen_loadgp_newabi, + (pic_reg, offset, incoming_address))); break; case LOADGP_RTP: base = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (VXWORKS_GOTT_BASE)); index = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (VXWORKS_GOTT_INDEX)); - emit_insn (Pmode == SImode - ? gen_loadgp_rtp_si (pic_reg, base, index) - : gen_loadgp_rtp_di (pic_reg, base, index)); + emit_insn (PMODE_INSN (gen_loadgp_rtp, (pic_reg, base, index))); break; default: @@ -9944,7 +9934,8 @@ mips_emit_loadgp (void) } if (TARGET_MIPS16) - emit_insn (gen_copygp_mips16 (pic_offset_table_rtx, pic_reg)); + emit_insn (PMODE_INSN (gen_copygp_mips16, + (pic_offset_table_rtx, pic_reg))); /* Emit a blockage if there are implicit uses of the GP register. This includes profiled functions, because FUNCTION_PROFILE uses @@ -10200,11 +10191,12 @@ mips_expand_prologue (void) temp = (SMALL_OPERAND (offset) ? gen_rtx_SCRATCH (Pmode) : MIPS_PROLOGUE_TEMP (Pmode)); - emit_insn (gen_potential_cprestore (mem, GEN_INT (offset), gp, temp)); + emit_insn (PMODE_INSN (gen_potential_cprestore, + (mem, GEN_INT (offset), gp, temp))); mips_get_cprestore_base_and_offset (&base, &offset, true); mem = gen_frame_mem (Pmode, plus_constant (base, offset)); - emit_insn (gen_use_cprestore (mem)); + emit_insn (PMODE_INSN (gen_use_cprestore, (mem))); } /* We need to search back to the last use of K0 or K1. */ @@ -15400,8 +15392,32 @@ mips_option_override (void) /* End of code shared with GAS. */ - /* If no -mlong* option was given, infer it from the other options. */ - if ((target_flags_explicit & MASK_LONG64) == 0) + /* If a -mlong* option was given, check that it matches the ABI, + otherwise infer the -mlong* setting from the other options. */ + if ((target_flags_explicit & MASK_LONG64) != 0) + { + if (TARGET_LONG64) + { + if (mips_abi == ABI_N32) + error ("%qs is incompatible with %qs", "-mabi=n32", "-mlong64"); + else if (mips_abi == ABI_32) + error ("%qs is incompatible with %qs", "-mabi=32", "-mlong64"); + else if (mips_abi == ABI_O64 && TARGET_ABICALLS) + /* We have traditionally allowed non-abicalls code to use + an LP64 form of o64. However, it would take a bit more + effort to support the combination of 32-bit GOT entries + and 64-bit pointers, so we treat the abicalls case as + an error. */ + error ("the combination of %qs and %qs is incompatible with %qs", + "-mabi=o64", "-mabicalls", "-mlong64"); + } + else + { + if (mips_abi == ABI_64) + error ("%qs is incompatible with %qs", "-mabi=64", "-mlong32"); + } + } + else { if ((mips_abi == ABI_EABI && TARGET_64BIT) || mips_abi == ABI_64) target_flags |= MASK_LONG64; Index: gcc/config/mips/mips.md =================================================================== --- gcc/config/mips/mips.md 2011-09-04 12:41:47.000000000 +0100 +++ gcc/config/mips/mips.md 2011-09-04 12:41:47.000000000 +0100 @@ -3866,7 +3866,7 @@ (define_insn_and_split "*got_page" (set_attr "mode" "")]) ;; Convenience expander that generates the rhs of a load_got insn. -(define_expand "unspec_got" +(define_expand "unspec_got_" [(unspec:P [(match_operand:P 0) (match_operand:P 1)] UNSPEC_LOAD_GOT)]) @@ -4783,10 +4783,10 @@ (define_insn_and_split "loadgp_rtp_" + [(set (match_operand:P 0 "register_operand" "=y") + (unspec:P [(match_operand:P 1 "register_operand" "d")] + UNSPEC_COPYGP))] "TARGET_MIPS16" { return mips_must_initialize_gp_p () ? "#" : ""; } "&& mips_must_initialize_gp_p ()" @@ -4800,12 +4800,12 @@ (define_insn_and_split "copygp_mips16" ;; ;; The "cprestore" pattern requires operand 2 to be pic_offset_table_rtx, ;; otherwise any register that holds the correct value will do. -(define_insn_and_split "potential_cprestore" - [(set (match_operand:SI 0 "cprestore_save_slot_operand" "=X,X") - (unspec:SI [(match_operand:SI 1 "const_int_operand" "I,i") - (match_operand:SI 2 "register_operand" "d,d")] - UNSPEC_POTENTIAL_CPRESTORE)) - (clobber (match_operand:SI 3 "scratch_operand" "=X,&d"))] +(define_insn_and_split "potential_cprestore_" + [(set (match_operand:P 0 "cprestore_save_slot_operand" "=X,X") + (unspec:P [(match_operand:P 1 "const_int_operand" "I,i") + (match_operand:P 2 "register_operand" "d,d")] + UNSPEC_POTENTIAL_CPRESTORE)) + (clobber (match_operand:P 3 "scratch_operand" "=X,&d"))] "!TARGET_CPRESTORE_DIRECTIVE || operands[2] == pic_offset_table_rtx" { return mips_must_initialize_gp_p () ? "#" : ""; } "mips_must_initialize_gp_p ()" @@ -4822,11 +4822,11 @@ (define_insn_and_split "potential_cprest ;; for the cprestore slot. Operand 1 is the offset of the slot from ;; the stack pointer. (This is redundant with operand 0, but it makes ;; things a little simpler.) -(define_insn "cprestore" - [(set (match_operand:SI 0 "cprestore_save_slot_operand" "=X,X") - (unspec:SI [(match_operand:SI 1 "const_int_operand" "I,i") - (reg:SI 28)] - UNSPEC_CPRESTORE))] +(define_insn "cprestore_" + [(set (match_operand:P 0 "cprestore_save_slot_operand" "=X,X") + (unspec:P [(match_operand:P 1 "const_int_operand" "I,i") + (reg:P 28)] + UNSPEC_CPRESTORE))] "TARGET_CPRESTORE_DIRECTIVE" { if (mips_nomacro.nesting_level > 0 && which_alternative == 1) @@ -4837,9 +4837,9 @@ (define_insn "cprestore" [(set_attr "type" "store") (set_attr "length" "4,12")]) -(define_insn "use_cprestore" - [(set (reg:SI CPRESTORE_SLOT_REGNUM) - (match_operand:SI 0 "cprestore_load_slot_operand"))] +(define_insn "use_cprestore_" + [(set (reg:P CPRESTORE_SLOT_REGNUM) + (match_operand:P 0 "cprestore_load_slot_operand"))] "" "" [(set_attr "type" "ghost")]) @@ -4856,9 +4856,7 @@ (define_expand "clear_cache" { mips_expand_synci_loop (operands[0], operands[1]); emit_insn (gen_sync ()); - emit_insn (Pmode == SImode - ? gen_clear_hazard_si () - : gen_clear_hazard_di ()); + emit_insn (PMODE_INSN (gen_clear_hazard, ())); } else if (mips_cache_flush_func && mips_cache_flush_func[0]) { @@ -5567,14 +5565,11 @@ (define_expand "indirect_jump" "" { operands[0] = force_reg (Pmode, operands[0]); - if (Pmode == SImode) - emit_jump_insn (gen_indirect_jumpsi (operands[0])); - else - emit_jump_insn (gen_indirect_jumpdi (operands[0])); + emit_jump_insn (PMODE_INSN (gen_indirect_jump, (operands[0]))); DONE; }) -(define_insn "indirect_jump" +(define_insn "indirect_jump_" [(set (pc) (match_operand:P 0 "register_operand" "d"))] "" "%*j\t%0%/" @@ -5605,14 +5600,11 @@ (define_expand "tablejump" start, 0, 0, OPTAB_WIDEN); } - if (Pmode == SImode) - emit_jump_insn (gen_tablejumpsi (operands[0], operands[1])); - else - emit_jump_insn (gen_tablejumpdi (operands[0], operands[1])); + emit_jump_insn (PMODE_INSN (gen_tablejump, (operands[0], operands[1]))); DONE; }) -(define_insn "tablejump" +(define_insn "tablejump_" [(set (pc) (match_operand:P 0 "register_operand" "d")) (use (label_ref (match_operand 1 "" "")))] @@ -5844,8 +5836,10 @@ (define_expand "exception_receiver" emit_insn (gen_set_got_version ()); /* If we have a call-clobbered $gp, restore it from its save slot. */ - if (HAVE_restore_gp) - emit_insn (gen_restore_gp ()); + if (HAVE_restore_gp_si) + emit_insn (gen_restore_gp_si ()); + else if (HAVE_restore_gp_di) + emit_insn (gen_restore_gp_di ()); DONE; }) @@ -5860,10 +5854,10 @@ (define_expand "nonlocal_goto_receiver" ;; Restore $gp from its .cprestore stack slot. The instruction remains ;; volatile until all uses of $28 are exposed. -(define_insn_and_split "restore_gp" - [(set (reg:SI 28) - (unspec_volatile:SI [(const_int 0)] UNSPEC_RESTORE_GP)) - (clobber (match_scratch:SI 0 "=&d"))] +(define_insn_and_split "restore_gp_" + [(set (reg:P 28) + (unspec_volatile:P [(const_int 0)] UNSPEC_RESTORE_GP)) + (clobber (match_scratch:P 0 "=&d"))] "TARGET_CALL_CLOBBERED_GP" "#" "&& epilogue_completed" Index: gcc/config/mips/mips-dsp.md =================================================================== --- gcc/config/mips/mips-dsp.md 2011-09-04 12:41:37.000000000 +0100 +++ gcc/config/mips/mips-dsp.md 2011-09-04 12:41:47.000000000 +0100 @@ -1105,10 +1105,8 @@ (define_expand "mips_lbux" "ISA_HAS_DSP" { operands[2] = convert_to_mode (Pmode, operands[2], false); - if (Pmode == SImode) - emit_insn (gen_mips_lbux_si (operands[0], operands[1], operands[2])); - else - emit_insn (gen_mips_lbux_di (operands[0], operands[1], operands[2])); + emit_insn (PMODE_INSN (gen_mips_lbux, + (operands[0], operands[1], operands[2]))); DONE; }) @@ -1129,10 +1127,8 @@ (define_expand "mips_lhx" "ISA_HAS_DSP" { operands[2] = convert_to_mode (Pmode, operands[2], false); - if (Pmode == SImode) - emit_insn (gen_mips_lhx_si (operands[0], operands[1], operands[2])); - else - emit_insn (gen_mips_lhx_di (operands[0], operands[1], operands[2])); + emit_insn (PMODE_INSN (gen_mips_lhx, + (operands[0], operands[1], operands[2]))); DONE; }) @@ -1153,10 +1149,8 @@ (define_expand "mips_lwx" "ISA_HAS_DSP" { operands[2] = convert_to_mode (Pmode, operands[2], false); - if (Pmode == SImode) - emit_insn (gen_mips_lwx_si (operands[0], operands[1], operands[2])); - else - emit_insn (gen_mips_lwx_di (operands[0], operands[1], operands[2])); + emit_insn (PMODE_INSN (gen_mips_lwx, + (operands[0], operands[1], operands[2]))); DONE; }) Index: gcc/testsuite/gcc.target/mips/abi-main.h =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-main.h 2011-09-04 12:41:47.000000000 +0100 @@ -0,0 +1,74 @@ +#define FOR_EACH_SCALAR(F) \ + F(sc, signed char) \ + F(uc, unsigned char) \ + F(ss, short) \ + F(us, unsigned short) \ + F(si, int) \ + F(ui, unsigned int) \ + F(sl, long) \ + F(ul, unsigned long) \ + F(sll, long long) \ + F(ull, unsigned long long) \ + F(f, float) \ + F(d, double) \ + F(ld, long double) \ + F(ptr, void *) + +#define EXTERN(SUFFIX, TYPE) extern TYPE x##SUFFIX; +#define STATIC(SUFFIX, TYPE) static TYPE s##SUFFIX; +#define COMMON(SUFFIX, TYPE) TYPE c##SUFFIX; + +#define GETADDR(SUFFIX, TYPE) \ + TYPE *get##SUFFIX (int which) \ + { \ + return (which == 0 ? &c##SUFFIX \ + : which == 1 ? &s##SUFFIX \ + : &x##SUFFIX); \ + } + +#define COPY(SUFFIX, TYPE) c##SUFFIX = s##SUFFIX; s##SUFFIX = x##SUFFIX; + +FOR_EACH_SCALAR (EXTERN) +FOR_EACH_SCALAR (STATIC) +FOR_EACH_SCALAR (COMMON) + +FOR_EACH_SCALAR (GETADDR) + +void +copy (void) +{ + FOR_EACH_SCALAR (COPY); +} + +extern void foo (int); + +void +sibcall1 (void) +{ + foo (1); +} + +void +sibcall2 (void) +{ + foo (csi + ssi + xsi); +} + +static void +sibcall3 (void) +{ + foo (1); + foo (2); + foo (3); +} + +extern void bar (void (*) (void)); + +int +nested (int x) +{ + void sub (void) { foo (x); } + bar (sub); + bar (sibcall3); + return 1; +} Index: gcc/testsuite/gcc.target/mips/abi-o32-long32.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-o32-long32.c 2011-09-04 12:41:47.000000000 +0100 @@ -0,0 +1,2 @@ +/* { dg-options "-mabi=32 -mlong32 addressing=absolute -O2" } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-o32-long64.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-o32-long64.c 2011-09-04 16:18:02.000000000 +0100 @@ -0,0 +1,3 @@ +/* { dg-options "-mabi=32 -mlong64 addressing=absolute -O2" } */ +/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-o64-long32.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-o64-long32.c 2011-09-04 12:41:47.000000000 +0100 @@ -0,0 +1,2 @@ +/* { dg-options "-mabi=o64 -mlong32 addressing=absolute -O2" } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-o64-long64.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-o64-long64.c 2011-09-04 12:41:47.000000000 +0100 @@ -0,0 +1,2 @@ +/* { dg-options "-mabi=o64 -mlong64 addressing=absolute -O2" } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-n32-long32.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-n32-long32.c 2011-09-04 16:17:23.000000000 +0100 @@ -0,0 +1,2 @@ +/* { dg-options "-mabi=n32 -mlong32 addressing=absolute -O2" } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-n32-long64.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-n32-long64.c 2011-09-04 16:17:29.000000000 +0100 @@ -0,0 +1,3 @@ +/* { dg-options "-mabi=n32 -mlong64 addressing=absolute -O2" } */ +/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-n64-long32.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-n64-long32.c 2011-09-04 16:17:44.000000000 +0100 @@ -0,0 +1,3 @@ +/* { dg-options "-mabi=64 -mlong32 addressing=absolute -O2" } */ +/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-n64-long64.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-n64-long64.c 2011-09-04 12:41:47.000000000 +0100 @@ -0,0 +1,2 @@ +/* { dg-options "-mabi=64 -mlong64 addressing=absolute -O2" } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-o32-long32-no-shared.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-o32-long32-no-shared.c 2011-09-04 12:41:47.000000000 +0100 @@ -0,0 +1,2 @@ +/* { dg-options "-mabi=32 -mlong32 -mabicalls -mno-shared -mno-plt -O2" } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-o32-long64-no-shared.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-o32-long64-no-shared.c 2011-09-04 16:18:05.000000000 +0100 @@ -0,0 +1,3 @@ +/* { dg-options "-mabi=32 -mlong64 -mabicalls -mno-shared -mno-plt -O2" } */ +/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-o64-long32-no-shared.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-o64-long32-no-shared.c 2011-09-04 12:41:47.000000000 +0100 @@ -0,0 +1,2 @@ +/* { dg-options "-mabi=o64 -mlong32 -mabicalls -mno-shared -mno-plt -O2" } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-o64-long64-no-shared.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-o64-long64-no-shared.c 2011-09-04 16:18:18.000000000 +0100 @@ -0,0 +1,3 @@ +/* { dg-options "-mabi=o64 -mlong64 -mabicalls -mno-shared -mno-plt -O2" } */ +/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-n32-long32-no-shared.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-n32-long32-no-shared.c 2011-09-04 12:41:47.000000000 +0100 @@ -0,0 +1,2 @@ +/* { dg-options "-mabi=n32 -mlong32 -mabicalls -mno-shared -mno-plt -O2" } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-n32-long64-no-shared.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-n32-long64-no-shared.c 2011-09-04 16:17:32.000000000 +0100 @@ -0,0 +1,3 @@ +/* { dg-options "-mabi=n32 -mlong64 -mabicalls -mno-shared -mno-plt -O2" } */ +/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-n64-long32-no-shared.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-n64-long32-no-shared.c 2011-09-04 16:17:48.000000000 +0100 @@ -0,0 +1,3 @@ +/* { dg-options "-mabi=64 -mlong32 -mabicalls -mno-shared -mno-plt -O2" } */ +/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-n64-long64-no-shared.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-n64-long64-no-shared.c 2011-09-04 12:41:47.000000000 +0100 @@ -0,0 +1,2 @@ +/* { dg-options "-mabi=64 -mlong64 -mabicalls -mno-shared -mno-plt -O2" } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-o32-long32-pic.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-o32-long32-pic.c 2011-09-04 12:41:47.000000000 +0100 @@ -0,0 +1,2 @@ +/* { dg-options "-mabi=32 -mlong32 -fpic -O2" } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-o32-long64-pic.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-o32-long64-pic.c 2011-09-04 16:18:08.000000000 +0100 @@ -0,0 +1,3 @@ +/* { dg-options "-mabi=32 -mlong64 -fpic -O2" } */ +/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-o64-long32-pic.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-o64-long32-pic.c 2011-09-04 12:41:47.000000000 +0100 @@ -0,0 +1,2 @@ +/* { dg-options "-mabi=o64 -mlong32 -fpic -O2" } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-o64-long64-pic.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-o64-long64-pic.c 2011-09-04 16:18:23.000000000 +0100 @@ -0,0 +1,3 @@ +/* { dg-options "-mabi=o64 -mlong64 -fpic -O2" } */ +/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-n32-long32-pic.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-n32-long32-pic.c 2011-09-04 12:41:47.000000000 +0100 @@ -0,0 +1,2 @@ +/* { dg-options "-mabi=n32 -mlong32 -fpic -O2" } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-n32-long64-pic.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-n32-long64-pic.c 2011-09-04 16:17:35.000000000 +0100 @@ -0,0 +1,3 @@ +/* { dg-options "-mabi=n32 -mlong64 -fpic -O2" } */ +/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-n64-long32-pic.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-n64-long32-pic.c 2011-09-04 16:17:53.000000000 +0100 @@ -0,0 +1,3 @@ +/* { dg-options "-mabi=64 -mlong32 -fpic -O2" } */ +/* { dg-error "is incompatible with" "" { target *-*-* } 0 } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-n64-long64-pic.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-n64-long64-pic.c 2011-09-04 12:41:47.000000000 +0100 @@ -0,0 +1,2 @@ +/* { dg-options "-mabi=64 -mlong64 -fpic -O2" } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-eabi32-long32.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-eabi32-long32.c 2011-09-04 12:41:47.000000000 +0100 @@ -0,0 +1,2 @@ +/* { dg-options "-mabi=eabi -mgp32 -mlong32 -O2" } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-eabi32-long64.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-eabi32-long64.c 2011-09-04 12:41:47.000000000 +0100 @@ -0,0 +1,2 @@ +/* { dg-options "-mabi=eabi -mgp32 -mlong64 -O2" } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-eabi64-long32.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-eabi64-long32.c 2011-09-04 12:41:47.000000000 +0100 @@ -0,0 +1,2 @@ +/* { dg-options "-mabi=eabi -mgp64 -mlong32 -O2" } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/abi-eabi64-long64.c =================================================================== --- /dev/null 2011-09-05 19:47:55.002782251 +0100 +++ gcc/testsuite/gcc.target/mips/abi-eabi64-long64.c 2011-09-04 12:41:47.000000000 +0100 @@ -0,0 +1,2 @@ +/* { dg-options "-mabi=eabi -mgp64 -mlong64 -O2" } */ +#include "abi-main.h" Index: gcc/testsuite/gcc.target/mips/mips.exp =================================================================== --- gcc/testsuite/gcc.target/mips/mips.exp 2011-09-04 16:21:29.000000000 +0100 +++ gcc/testsuite/gcc.target/mips/mips.exp 2011-09-04 16:22:31.000000000 +0100 @@ -850,6 +850,7 @@ proc mips-dg-options { args } { mips_option_dependency options "-mrelax-pic-calls" "-mexplicit-relocs" mips_option_dependency options "-fpic" "-mshared" mips_option_dependency options "-mshared" "-mno-plt" + mips_option_dependency options "-mshared" "-mabicalls" mips_option_dependency options "-mno-plt" "addressing=unknown" mips_option_dependency options "-mabicalls" "-G0" mips_option_dependency options "-mno-gpopt" "-mexplicit-relocs" Index: gcc/testsuite/gcc.target/mips/branch-2.c =================================================================== --- gcc/testsuite/gcc.target/mips/branch-2.c 2011-09-04 16:22:59.000000000 +0100 +++ gcc/testsuite/gcc.target/mips/branch-2.c 2011-09-04 16:25:57.000000000 +0100 @@ -1,4 +1,4 @@ -/* { dg-options "-mabicalls -mshared -mabi=32" } */ +/* { dg-options "-mshared -mabi=32" } */ /* { dg-final { scan-assembler-not "(\\\$25|\\\$28|cpload)" } } */ /* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */ /* { dg-final { scan-assembler-not "cprestore" } } */ Index: gcc/testsuite/gcc.target/mips/branch-3.c =================================================================== --- gcc/testsuite/gcc.target/mips/branch-3.c 2011-09-04 16:22:59.000000000 +0100 +++ gcc/testsuite/gcc.target/mips/branch-3.c 2011-09-04 16:25:57.000000000 +0100 @@ -1,4 +1,4 @@ -/* { dg-options "-mabicalls -mshared -mabi=32" } */ +/* { dg-options "-mshared -mabi=32" } */ /* { dg-final { scan-assembler "\t\\.cpload\t\\\$25\n" } } */ /* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */ /* { dg-final { scan-assembler-not "cprestore" } } */ Index: gcc/testsuite/gcc.target/mips/branch-4.c =================================================================== --- gcc/testsuite/gcc.target/mips/branch-4.c 2011-09-04 16:22:59.000000000 +0100 +++ gcc/testsuite/gcc.target/mips/branch-4.c 2011-09-04 16:25:57.000000000 +0100 @@ -1,4 +1,4 @@ -/* { dg-options "-mabicalls -mshared -mabi=n32" } */ +/* { dg-options "-mshared -mabi=n32" } */ /* { dg-final { scan-assembler-not "(\\\$25|\\\$28|%gp_rel|%got)" } } */ /* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */ Index: gcc/testsuite/gcc.target/mips/branch-5.c =================================================================== --- gcc/testsuite/gcc.target/mips/branch-5.c 2011-09-04 16:22:59.000000000 +0100 +++ gcc/testsuite/gcc.target/mips/branch-5.c 2011-09-04 16:25:57.000000000 +0100 @@ -1,4 +1,4 @@ -/* { dg-options "-mabicalls -mshared -mabi=n32" } */ +/* { dg-options "-mshared -mabi=n32" } */ /* { dg-final { scan-assembler "\taddiu\t\\\$3,\\\$3,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */ /* { dg-final { scan-assembler "\tlw\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */ /* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */ Index: gcc/testsuite/gcc.target/mips/branch-6.c =================================================================== --- gcc/testsuite/gcc.target/mips/branch-6.c 2011-09-04 16:22:59.000000000 +0100 +++ gcc/testsuite/gcc.target/mips/branch-6.c 2011-09-04 16:25:57.000000000 +0100 @@ -1,4 +1,4 @@ -/* { dg-options "-mabicalls -mshared -mabi=64" } */ +/* { dg-options "-mshared -mabi=64" } */ /* { dg-final { scan-assembler-not "(\\\$25|\\\$28|%gp_rel|%got)" } } */ /* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */ Index: gcc/testsuite/gcc.target/mips/branch-7.c =================================================================== --- gcc/testsuite/gcc.target/mips/branch-7.c 2011-09-04 16:22:59.000000000 +0100 +++ gcc/testsuite/gcc.target/mips/branch-7.c 2011-09-04 16:25:57.000000000 +0100 @@ -1,4 +1,4 @@ -/* { dg-options "-mabicalls -mshared -mabi=64" } */ +/* { dg-options "-mshared -mabi=64" } */ /* { dg-final { scan-assembler "\tdaddiu\t\\\$3,\\\$3,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */ /* { dg-final { scan-assembler "\tld\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */ /* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */ Index: gcc/testsuite/gcc.target/mips/branch-8.c =================================================================== --- gcc/testsuite/gcc.target/mips/branch-8.c 2011-09-04 16:22:59.000000000 +0100 +++ gcc/testsuite/gcc.target/mips/branch-8.c 2011-09-04 16:25:57.000000000 +0100 @@ -1,4 +1,4 @@ -/* { dg-options "-mabicalls -mshared -mabi=32" } */ +/* { dg-options "-mshared -mabi=32" } */ /* { dg-final { scan-assembler-not "(\\\$28|cpload|cprestore)" } } */ /* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */ Index: gcc/testsuite/gcc.target/mips/branch-9.c =================================================================== --- gcc/testsuite/gcc.target/mips/branch-9.c 2011-09-04 16:22:59.000000000 +0100 +++ gcc/testsuite/gcc.target/mips/branch-9.c 2011-09-04 16:25:57.000000000 +0100 @@ -1,4 +1,4 @@ -/* { dg-options "-mabicalls -mshared -mabi=32" } */ +/* { dg-options "-mshared -mabi=32" } */ /* { dg-final { scan-assembler "\t\\.cpload\t\\\$25\n" } } */ /* { dg-final { scan-assembler "\t\\.cprestore\t16\n" } } */ /* { dg-final { scan-assembler "\tlw\t\\\$1,16\\(\\\$fp\\)\n" } } */ Index: gcc/testsuite/gcc.target/mips/branch-10.c =================================================================== --- gcc/testsuite/gcc.target/mips/branch-10.c 2011-09-04 16:22:59.000000000 +0100 +++ gcc/testsuite/gcc.target/mips/branch-10.c 2011-09-04 16:25:57.000000000 +0100 @@ -1,4 +1,4 @@ -/* { dg-options "-mabicalls -mshared -mabi=n32" } */ +/* { dg-options "-mshared -mabi=n32" } */ /* { dg-final { scan-assembler-not "(\\\$28|%gp_rel|%got)" } } */ /* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */ Index: gcc/testsuite/gcc.target/mips/branch-11.c =================================================================== --- gcc/testsuite/gcc.target/mips/branch-11.c 2011-09-04 16:22:59.000000000 +0100 +++ gcc/testsuite/gcc.target/mips/branch-11.c 2011-09-04 16:25:57.000000000 +0100 @@ -1,4 +1,4 @@ -/* { dg-options "-mabicalls -mshared -mabi=n32" } */ +/* { dg-options "-mshared -mabi=n32" } */ /* { dg-final { scan-assembler "\tsd\t\\\$28," } } */ /* { dg-final { scan-assembler "\tld\t\\\$28," } } */ /* { dg-final { scan-assembler "\taddiu\t\\\$28,\\\$28,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */ Index: gcc/testsuite/gcc.target/mips/branch-12.c =================================================================== --- gcc/testsuite/gcc.target/mips/branch-12.c 2011-09-04 16:22:59.000000000 +0100 +++ gcc/testsuite/gcc.target/mips/branch-12.c 2011-09-04 16:25:57.000000000 +0100 @@ -1,4 +1,4 @@ -/* { dg-options "-mabicalls -mshared -mabi=64" } */ +/* { dg-options "-mshared -mabi=64" } */ /* { dg-final { scan-assembler-not "(\\\$28|%gp_rel|%got)" } } */ /* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */ Index: gcc/testsuite/gcc.target/mips/branch-13.c =================================================================== --- gcc/testsuite/gcc.target/mips/branch-13.c 2011-09-04 16:22:59.000000000 +0100 +++ gcc/testsuite/gcc.target/mips/branch-13.c 2011-09-04 16:25:57.000000000 +0100 @@ -1,4 +1,4 @@ -/* { dg-options "-mabicalls -mshared -mabi=64" } */ +/* { dg-options "-mshared -mabi=64" } */ /* { dg-final { scan-assembler "\tsd\t\\\$28," } } */ /* { dg-final { scan-assembler "\tld\t\\\$28," } } */ /* { dg-final { scan-assembler "\tdaddiu\t\\\$28,\\\$28,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */ Index: gcc/testsuite/gcc.target/mips/lazy-binding-1.c =================================================================== --- gcc/testsuite/gcc.target/mips/lazy-binding-1.c 2011-09-04 16:23:09.000000000 +0100 +++ gcc/testsuite/gcc.target/mips/lazy-binding-1.c 2011-09-04 16:26:02.000000000 +0100 @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-mabicalls -mshared -mexplicit-relocs -O2 -fno-delayed-branch" } */ +/* { dg-options "-mshared -mexplicit-relocs -O2 -fno-delayed-branch" } */ void bar (void);