===================================================================
@@ -182,6 +182,14 @@ struct target_reload {
enum machine_mode (x_regno_save_mode
[FIRST_PSEUDO_REGISTER]
[MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]);
+
+ /* We will only make a register eligible for caller-save if it can be
+ saved in its widest mode with a simple SET insn as long as the memory
+ address is valid. We record the INSN_CODE is those insns here since
+ when we emit them, the addresses might not be valid, so they might not
+ be recognized. */
+ int x_cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
+ int x_cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
};
extern struct target_reload default_target_reload;
===================================================================
@@ -44,6 +44,10 @@ #define MOVE_MAX_WORDS (MOVE_MAX / UNITS
#define regno_save_mode \
(this_target_reload->x_regno_save_mode)
+#define cached_reg_save_code \
+ (this_target_reload->x_cached_reg_save_code)
+#define cached_reg_restore_code \
+ (this_target_reload->x_cached_reg_restore_code)
/* For each hard register, a place on the stack where it can be saved,
if needed. */
@@ -57,17 +61,6 @@ #define regno_save_mode \
/* Allocated slots so far. */
static rtx save_slots[FIRST_PSEUDO_REGISTER];
-/* We will only make a register eligible for caller-save if it can be
- saved in its widest mode with a simple SET insn as long as the memory
- address is valid. We record the INSN_CODE is those insns here since
- when we emit them, the addresses might not be valid, so they might not
- be recognized. */
-
-static int
- cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
-static int
- cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
-
/* Set of hard regs currently residing in save area (during insn scan). */
static HARD_REG_SET hard_regs_saved;