From patchwork Fri Nov 22 08:20:04 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 293361 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B0AE22C00A7 for ; Fri, 22 Nov 2013 19:20:24 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:mime-version:content-type; q=dns; s=default; b=t5pwc62UTUq5L44iX5FUCsPos2FCDxadh+OfraIkHUAB3qTaEW NwETw7rCHexVnU1qkbPB2zhu6EG4x+xVmGr7PHNRh0TryhujTXxfQ1EJ2pJrPhdD aM7nS/7v8LYj/3RrIwXBpyzF6jsBmyf2pMCMfO4oaOY6ErHZiPp7Bi7ew= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:mime-version:content-type; s= default; bh=5JoHTkF1q8ycDjIrhFOmrd/sSAs=; b=FlL+66LaWhzHe7nYeYBc WgMv0plGmSAqrUHD8QL1nMRzioJ5+fAMZfY4wHUN0ph+YXwmTcE47FeVoPbjYPnL JOcSnmkddFYzMFfxmzKdEUDyIoDcgQ3KUw20+eHnWHtAU7eoUBlALQ3XrZe5aqnc 8Lllrx+FO3SAPsZgdoWCVOU= Received: (qmail 8495 invoked by alias); 22 Nov 2013 08:20:15 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 8485 invoked by uid 89); 22 Nov 2013 08:20:14 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.8 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RDNS_NONE, SPF_PASS, URIBL_BLOCKED autolearn=no version=3.3.2 X-HELO: mail-wi0-f175.google.com Received: from Unknown (HELO mail-wi0-f175.google.com) (209.85.212.175) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Fri, 22 Nov 2013 08:20:13 +0000 Received: by mail-wi0-f175.google.com with SMTP id hi5so352981wib.14 for ; Fri, 22 Nov 2013 00:20:05 -0800 (PST) X-Received: by 10.194.88.138 with SMTP id bg10mr473717wjb.56.1385108405045; Fri, 22 Nov 2013 00:20:05 -0800 (PST) Received: from localhost ([2.28.235.51]) by mx.google.com with ESMTPSA id bs15sm13308743wib.10.2013.11.22.00.20.04 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 22 Nov 2013 00:20:04 -0800 (PST) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, dj@redhat.com, rdsandiford@googlemail.com Cc: dj@redhat.com Subject: [m32c] Avoid genrecog warning Date: Fri, 22 Nov 2013 08:20:04 +0000 Message-ID: <87a9gw6e6j.fsf@talisman.default> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 I have a patch to upgrade most genrecog warnings into errors. This patch fixes one for m32c about stzx_16 and stzx_24_ allowing constant integers as destinations (as in, that's what the predicates would accept). Tested by building m32c-elf with the warnings turned to errors, and by comparing the before and after assembly output at -O2 for gcc.c-torture, gcc.dg and g++.dg. OK to install? Thanks, Richard gcc/ * config/m32c/cond.md (stzx_16): Use register_operand for operand 0. (stzx_24_): Likewise mra_operand. Index: gcc/config/m32c/cond.md =================================================================== --- gcc/config/m32c/cond.md 2013-11-16 21:52:15.083787117 +0000 +++ gcc/config/m32c/cond.md 2013-11-16 21:58:58.823042647 +0000 @@ -75,7 +75,7 @@ (define_insn "bcc_op" ) (define_insn "stzx_16" - [(set (match_operand:QI 0 "mrai_operand" "=R0w,R0w,R0w") + [(set (match_operand:QI 0 "register_operand" "=R0w,R0w,R0w") (if_then_else:QI (eq (reg:CC FLG_REGNO) (const_int 0)) (match_operand:QI 1 "const_int_operand" "i,i,0") (match_operand:QI 2 "const_int_operand" "i,0,i")))] @@ -88,7 +88,7 @@ (define_insn "stzx_16" ) (define_insn "stzx_24_" - [(set (match_operand:QHI 0 "mrai_operand" "=RraSd,RraSd,RraSd") + [(set (match_operand:QHI 0 "mra_operand" "=RraSd,RraSd,RraSd") (if_then_else:QHI (eq (reg:CC FLG_REGNO) (const_int 0)) (match_operand:QHI 1 "const_int_operand" "i,i,0") (match_operand:QHI 2 "const_int_operand" "i,0,i")))]