diff mbox series

rs6000: Implement [u]avg<mode>3_ceil

Message ID 83ec1fab412fa8eb716aa8a4b12d0b0883204b78.1571871051.git.segher@kernel.crashing.org
State New
Headers show
Series rs6000: Implement [u]avg<mode>3_ceil | expand

Commit Message

Segher Boessenkool Oct. 24, 2019, 6:19 p.m. UTC
We already had those in fact, just under other names.  Use the standard
names so that the vectorizer can use it.

Committing to trunk; will backport to 9 and 8 later.


Segher


2019-10-24  Segher Boessenkool  <segher@kernel.crashing.org>

	* config/rs6000/altivec.md (altivec_vavgu<VI_char>): Rename to...
	(uavg<mode>3_ceil): ... This.
	(altivec_vavgs<VI_char>): Rename to...
	(avg<mode>3_ceil): ... This.
	* rs6000-builtin.def (VAVGUB, VAVGSB, VAVGUH, VAVGSH, VAVGUW, VAVGSW):
	Adjust.

---
 gcc/config/rs6000/altivec.md         |  4 ++--
 gcc/config/rs6000/rs6000-builtin.def | 12 ++++++------
 2 files changed, 8 insertions(+), 8 deletions(-)

Comments

Segher Boessenkool Nov. 5, 2019, 5:37 p.m. UTC | #1
On Thu, Oct 24, 2019 at 06:19:03PM +0000, Segher Boessenkool wrote:
> We already had those in fact, just under other names.  Use the standard
> names so that the vectorizer can use it.
> 
> Committing to trunk; will backport to 9 and 8 later.

I've done those backports now.


Segher


> 	* config/rs6000/altivec.md (altivec_vavgu<VI_char>): Rename to...
> 	(uavg<mode>3_ceil): ... This.
> 	(altivec_vavgs<VI_char>): Rename to...
> 	(avg<mode>3_ceil): ... This.
> 	* rs6000-builtin.def (VAVGUB, VAVGSB, VAVGUH, VAVGSH, VAVGUW, VAVGSW):
> 	Adjust.
diff mbox series

Patch

diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index dc34528..daa91a4 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -560,7 +560,7 @@  (define_insn "altivec_vsubs<VI_char>s"
   [(set_attr "type" "vecsimple")])
 
 ;;
-(define_insn "altivec_vavgu<VI_char>"
+(define_insn "uavg<mode>3_ceil"
   [(set (match_operand:VI 0 "register_operand" "=v")
         (unspec:VI [(match_operand:VI 1 "register_operand" "v")
                     (match_operand:VI 2 "register_operand" "v")]
@@ -569,7 +569,7 @@  (define_insn "altivec_vavgu<VI_char>"
   "vavgu<VI_char> %0,%1,%2"
   [(set_attr "type" "vecsimple")])
 
-(define_insn "altivec_vavgs<VI_char>"
+(define_insn "avg<mode>3_ceil"
   [(set (match_operand:VI 0 "register_operand" "=v")
         (unspec:VI [(match_operand:VI 1 "register_operand" "v")
                     (match_operand:VI 2 "register_operand" "v")]
diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def
index 4d4f3b3..0feee7c 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -1002,12 +1002,12 @@  BU_ALTIVEC_2 (VADDUWS,	      "vadduws",	CONST,	altivec_vadduws)
 BU_ALTIVEC_2 (VADDSWS,	      "vaddsws",	CONST,	altivec_vaddsws)
 BU_ALTIVEC_2 (VAND,	      "vand",		CONST,	andv4si3)
 BU_ALTIVEC_2 (VANDC,	      "vandc",		CONST,	andcv4si3)
-BU_ALTIVEC_2 (VAVGUB,	      "vavgub",		CONST,	altivec_vavgub)
-BU_ALTIVEC_2 (VAVGSB,	      "vavgsb",		CONST,	altivec_vavgsb)
-BU_ALTIVEC_2 (VAVGUH,	      "vavguh",		CONST,	altivec_vavguh)
-BU_ALTIVEC_2 (VAVGSH,	      "vavgsh",		CONST,	altivec_vavgsh)
-BU_ALTIVEC_2 (VAVGUW,	      "vavguw",		CONST,	altivec_vavguw)
-BU_ALTIVEC_2 (VAVGSW,	      "vavgsw",		CONST,	altivec_vavgsw)
+BU_ALTIVEC_2 (VAVGUB,	      "vavgub",		CONST,	uavgv16qi3_ceil)
+BU_ALTIVEC_2 (VAVGSB,	      "vavgsb",		CONST,	avgv16qi3_ceil)
+BU_ALTIVEC_2 (VAVGUH,	      "vavguh",		CONST,	uavgv8hi3_ceil)
+BU_ALTIVEC_2 (VAVGSH,	      "vavgsh",		CONST,	avgv8hi3_ceil)
+BU_ALTIVEC_2 (VAVGUW,	      "vavguw",		CONST,	uavgv4si3_ceil)
+BU_ALTIVEC_2 (VAVGSW,	      "vavgsw",		CONST,	avgv4si3_ceil)
 BU_ALTIVEC_2 (VCFUX,	      "vcfux",		CONST,	altivec_vcfux)
 BU_ALTIVEC_2 (VCFSX,	      "vcfsx",		CONST,	altivec_vcfsx)
 BU_ALTIVEC_2 (VCMPBFP,	      "vcmpbfp",	CONST,	altivec_vcmpbfp)