From patchwork Fri Jan 24 16:07:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeff Law X-Patchwork-Id: 1228888 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-518230-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha1 header.s=default header.b=GuVxFJsd; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256 header.s=mimecast20190719 header.b=K1AlDnLe; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4843vD5QG4z9sRW for ; Sat, 25 Jan 2020 03:07:35 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:subject:from:reply-to:to:date:mime-version :content-type; q=dns; s=default; b=MubwhRZiqz4yQ47xtrcCFa5/Yq7n4 pWf/TUyl7bODnlyElPZzpoJTGF6cGuUrMLqWjyYHFczpdW3TEU3X3WaN57qkhk80 JJREDRzj86c/cUNSYBAoomf58jz0x2jDtj1B5lzfjNV5TkmTiIci0LxBxevWVQZc wLecs+l9n4slQg= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:subject:from:reply-to:to:date:mime-version :content-type; s=default; bh=gM3nL/EOv6EiPw8NVJrZ27n/e0Y=; b=GuV xFJsdp00LteZ6pu8SzeA4mYQdfgb2dqOCENY3IU+uJ3YdJWP4ZO7OEtjjCd6LohH pX2UTOheVfMnvq6Q2z0KCnavJiN4eu5WNgslG2mO/RovfZ/01u0hHJWZdSjos0vN HAmj0mm8at+QBH6U6/G7N924jHtEFaWNAF+r5Q9M= Received: (qmail 55774 invoked by alias); 24 Jan 2020 16:07:22 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 55763 invoked by uid 89); 24 Jan 2020 16:07:22 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-14.6 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 spammy=standing, overnight X-HELO: us-smtp-1.mimecast.com Received: from us-smtp-delivery-1.mimecast.com (HELO us-smtp-1.mimecast.com) (205.139.110.120) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 24 Jan 2020 16:07:20 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1579882038; h=from:from:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:mime-version:mime-version: content-type:content-type; bh=7K23SLrL1cEPWbAsP9GaVhSmiusOdtqa/tWmtUx2taM=; b=K1AlDnLekAiMZ8wQBfiflgag+2Fp6Mq85vVo2bG2BU4OuQWusIV/Nsyh+6vIo6+b5S/nZD eOGXSO2elMgYHnRzFDauEOI8GLbkwN1UnPYRLzYjnAGtKCFwQCKixh1DkpRMKP1ZSTDF2R XeS87Bevk6KBbVg0BtAvWylZsriAYYM= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-214-Fbmdgz78NaGAz3U8WBxYFw-1; Fri, 24 Jan 2020 11:07:15 -0500 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id D061E7A61E for ; Fri, 24 Jan 2020 16:07:14 +0000 (UTC) Received: from ovpn-117-120.phx2.redhat.com (ovpn-117-120.phx2.redhat.com [10.3.117.120]) by smtp.corp.redhat.com (Postfix) with ESMTP id A3ADC5C1B0 for ; Fri, 24 Jan 2020 16:07:14 +0000 (UTC) Message-ID: <81fd4c8f34737fe1e0212315a3140ed48902e0d8.camel@redhat.com> Subject: [committed] [PR target/13721] Emit reasonable diagnostic rather than ICE for bogus ASM on H8 port From: Jeff Law Reply-To: law@redhat.com To: gcc-patches Date: Fri, 24 Jan 2020 09:07:14 -0700 User-Agent: Evolution 3.34.3 (3.34.3-1.fc31) MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-IsSubscribed: yes This fixes a long standing minor issue with the H8 port. Again, given the very narrow scope here, I'm going forward even though we're in stage4. The H8 port will ICE under the right (wrong?) circumstances when we get an unexpected operand in an asm, particularly asms that want to output the name of a byte sized register. Eons ago this was a segfault. Kazu improved things with an assertion, but really the right thing to do here is to use output_operand_lossage. This patch protects the calls to byte_reg, ensuring it's only called with REGs and adds calls to output_operand_lossage for the other cases. Tested in my tester overnight with no regressions. Committed to the trunk. Jeff commit 64c9f2d9972ad359a32f0a97ee0a806c2532db15 Author: Jeff Law Date: Fri Jan 24 08:57:46 2020 -0700 Emit reasonable diagnostic rather than ICE on invalid ASM on H8 port PR target/13721 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg for REGs. Call output_operand_lossage to get more reasonable diagnostics. PR target/13721 * gcc.target/h8300/pr13721.c: New test. diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 27e5ec23409..4d851c0b170 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2020-01-24 Jeff Law + + PR target/13721 + * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg + for REGs. Call output_operand_lossage to get more reasonable + diagnostics. + 2020-01-24 Andrew Stubbs * config/gcn/gcn-valu.md (vec_cmpdi): Use diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c index ffbfa9eaaa9..def8be344af 100644 --- a/gcc/config/h8300/h8300.c +++ b/gcc/config/h8300/h8300.c @@ -1647,40 +1647,52 @@ h8300_print_operand (FILE *file, rtx x, int code) case 's': if (GET_CODE (x) == CONST_INT) fprintf (file, "#%ld", (INTVAL (x)) & 0xff); - else + else if (GET_CODE (x) == REG) fprintf (file, "%s", byte_reg (x, 0)); + else + output_operand_lossage ("Expected register or constant integer."); break; case 't': if (GET_CODE (x) == CONST_INT) fprintf (file, "#%ld", (INTVAL (x) >> 8) & 0xff); - else + else if (GET_CODE (x) == REG) fprintf (file, "%s", byte_reg (x, 1)); + else + output_operand_lossage ("Expected register or constant integer."); break; case 'w': if (GET_CODE (x) == CONST_INT) fprintf (file, "#%ld", INTVAL (x) & 0xff); - else + else if (GET_CODE (x) == REG) fprintf (file, "%s", byte_reg (x, TARGET_H8300 ? 2 : 0)); + else + output_operand_lossage ("Expected register or constant integer."); break; case 'x': if (GET_CODE (x) == CONST_INT) fprintf (file, "#%ld", (INTVAL (x) >> 8) & 0xff); - else + else if (GET_CODE (x) == REG) fprintf (file, "%s", byte_reg (x, TARGET_H8300 ? 3 : 1)); + else + output_operand_lossage ("Expected register or constant integer."); break; case 'y': if (GET_CODE (x) == CONST_INT) fprintf (file, "#%ld", (INTVAL (x) >> 16) & 0xff); - else + else if (GET_CODE (x) == REG) fprintf (file, "%s", byte_reg (x, 0)); + else + output_operand_lossage ("Expected register or constant integer."); break; case 'z': if (GET_CODE (x) == CONST_INT) fprintf (file, "#%ld", (INTVAL (x) >> 24) & 0xff); - else + else if (GET_CODE (x) == REG) fprintf (file, "%s", byte_reg (x, 1)); + else + output_operand_lossage ("Expected register or constant integer."); break; default: diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index c465ff99541..c0699907f1c 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2020-01-24 Jeff Law PR debug/92763 diff --git a/gcc/testsuite/gcc.target/h8300/pr13721.c b/gcc/testsuite/gcc.target/h8300/pr13721.c new file mode 100644 index 00000000000..817b5377448 --- /dev/null +++ b/gcc/testsuite/gcc.target/h8300/pr13721.c @@ -0,0 +1,71 @@ +static __inline__ __attribute__((always_inline)) void set_bit(int nr, volatile void * addr) +{ + volatile unsigned char *b_addr; + b_addr = (volatile unsigned char *)addr + ((nr >> 3) ^ 3); + nr &= 7; + if (__builtin_constant_p (nr)) + { + switch(nr) + { + case 0: + __asm__("bset #0,%0" :"+m"(*b_addr) :"m"(*b_addr)); + break; + case 1: + __asm__("bset #1,%0" :"+m"(*b_addr) :"m"(*b_addr)); + break; + case 2: + __asm__("bset #2,%0" :"+m"(*b_addr) :"m"(*b_addr)); + break; + case 3: + __asm__("bset #3,%0" :"+m"(*b_addr) :"m"(*b_addr)); + break; + case 4: + __asm__("bset #4,%0" :"+m"(*b_addr) :"m"(*b_addr)); + break; + case 5: + __asm__("bset #5,%0" :"+m"(*b_addr) :"m"(*b_addr)); + break; + case 6: + __asm__("bset #6,%0" :"+m"(*b_addr) :"m"(*b_addr)); + break; + case 7: + __asm__("bset #7,%0" :"+m"(*b_addr) :"m"(*b_addr)); + break; + } + } + else + { + __asm__("bset %w1,%0" :"+m"(*b_addr) :"g"(nr),"m"(*b_addr)); /* { dg-error "invalid 'asm'" "" } */ + + } +} + +static __inline__ __attribute__((always_inline)) int test_bit(int nr, const volatile void * addr) +{ + return (*((volatile unsigned char *)addr + ((nr >> 3) ^ 3)) & (1UL << (nr & 7))) != 0; +} + +struct a { + unsigned long a; +}; + +void dummy(struct a *a, int b); + +int ice_func(struct a *a, int b) +{ + int c,d; + unsigned int e; + + for(c=0;ca); + dummy(a, d * a->a); + set_bit(d, &e); + } + } + dummy(a, d * a->a); + } + + return 0; +}