diff mbox series

Fix PR rtl-optimization/99376

Message ID 8038070.OWGzCiThVa@fomalhaut
State New
Headers show
Series Fix PR rtl-optimization/99376 | expand

Commit Message

Eric Botcazou March 4, 2021, 4:58 p.m. UTC 
Hi,

this is an undefined behavior spotted by the sanitizer that has managed to go 
unnoticed until now.  Tested on x86-64/Linux, OK for the mainline?


2021-03-04  Eric Botcazou  <ebotcazou@adacore.com>

	PR rtl-optimization/99376
	* rtlanal.c (nonzero_bits1) <arithmetic operators>: If the number
	of low-order zero bits is too large, set the result to 0 directly.

Comments

Richard Biener March 5, 2021, 10:22 a.m. UTC | #1 
On Thu, Mar 4, 2021 at 7:28 PM Eric Botcazou <botcazou@adacore.com> wrote:
>
> Hi,
>
> this is an undefined behavior spotted by the sanitizer that has managed to go
> unnoticed until now.  Tested on x86-64/Linux, OK for the mainline?

OK.

>
> 2021-03-04  Eric Botcazou  <ebotcazou@adacore.com>
>
>         PR rtl-optimization/99376
>         * rtlanal.c (nonzero_bits1) <arithmetic operators>: If the number
>         of low-order zero bits is too large, set the result to 0 directly.
>
> --
> Eric Botcazou
diff mbox series

Patch

diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index d1240b0b7c5..a8ea1d72636 100644
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -5053,11 +5053,17 @@  nonzero_bits1 (const_rtx x, scalar_int_mode mode, const_rtx known_x,
 	    gcc_unreachable ();
 	  }
 
+	/* Note that mode_width <= HOST_BITS_PER_WIDE_INT, see above.  */
 	if (result_width < mode_width)
 	  nonzero &= (HOST_WIDE_INT_1U << result_width) - 1;
 
 	if (result_low > 0)
-	  nonzero &= ~((HOST_WIDE_INT_1U << result_low) - 1);
+	  {
+	    if (result_low < HOST_BITS_PER_WIDE_INT)
+	      nonzero &= ~((HOST_WIDE_INT_1U << result_low) - 1);
+	    else
+	      nonzero = 0;
+	  }
       }
       break;