From patchwork Fri May 23 06:09:39 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Segher Boessenkool X-Patchwork-Id: 351737 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 9EA59140085 for ; Fri, 23 May 2014 16:13:29 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id; q=dns; s=default; b=u0DEq81OjuXm 1coXKEwJRnLIgpdouXuhMksZ3v2jmZPm2TdpTJghcP9ednEayJLiab2Av0gOv9Q0 GopfANbOmAIrxKMUy4jnbweiTQAKPRndQ9FpBFif1PeC8pzoynnCK8X6GXXLBp4s kCMwiEVeO7J80J4ddrQNc6wz7MNocQM= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id; s=default; bh=Zz6KG9JKIpJZeun/v5 8bLsIIm+M=; b=AX62k9Vu8hc87pNhnIseuh4fI3/e3edAjIQQ9WK7oKJcbdLE87 gtbSYgnx61QIMwfD5VgaLvrumP4MxAdqu+zFmCyJnCymhFj4azZhcjFU5R5YsHNw XyR5sKyKoU/HVxrztL+UcYhcalb1oHbtrwS5fjjH4FZm/YsSLAvK2RMRs= Received: (qmail 6494 invoked by alias); 23 May 2014 06:13:22 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 6477 invoked by uid 89); 23 May 2014 06:13:21 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.4 required=5.0 tests=AWL, BAYES_00, RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: gcc1-power7.osuosl.org Received: from gcc1-power7.osuosl.org (HELO gcc1-power7.osuosl.org) (140.211.15.137) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Fri, 23 May 2014 06:13:17 +0000 Received: from gcc1-power7.osuosl.org (localhost [127.0.0.1]) by gcc1-power7.osuosl.org (8.14.6/8.14.6) with ESMTP id s4N6A632052538; Thu, 22 May 2014 23:10:06 -0700 Received: (from segher@localhost) by gcc1-power7.osuosl.org (8.14.6/8.14.6/Submit) id s4N6A3hR051062; Thu, 22 May 2014 23:10:03 -0700 From: Segher Boessenkool To: gcc-patches@gcc.gnu.org Cc: dje.gcc@gmail.com, Segher Boessenkool Subject: [PATCH 1/9] rs6000: Clean up the "type" attribute Date: Thu, 22 May 2014 23:09:39 -0700 Message-Id: <772148b5d4435e60c32b73f3c92d28b61525b6d5.1400795768.git.segher@kernel.crashing.org> X-IsSubscribed: yes Get rid of the one huge line. Group and order things a bit. Further changes will follow so this doesn't try to make it perfect. The rest of this patch series reduces the number of different integer instruction types by folding many together using attributes "size" (the data size), "dot" (does this instruction set CR0), and "var_shift" (for shift instructions: is the shift amount from a register). Many scheduling descriptions are incomplete; many instruction patterns use the wrong instruction type. Hopefully things will be better if there aren't that many different types to handle. Each patch bootstrapped on powerpc64-linux, tested with -m64,-m64/-mtune=power8,-m32,-m32/-mpowerpc64; no regressions (and nothing magically fixed either). Okay to apply? Segher 2014-05-22 Segher Boessenkool gcc/ * config/rs6000/rs6000.md (type): Reorder, reformat. --- gcc/config/rs6000/rs6000.md | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 300bd36..667aac1 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -157,7 +157,22 @@ (define_c_enum "unspecv" ;; Define an insn type attribute. This is used in function unit delay ;; computations. -(define_attr "type" "integer,two,three,load,store,fpload,fpstore,vecload,vecstore,imul,imul2,imul3,lmul,idiv,ldiv,insert_word,branch,cmp,fast_compare,compare,var_delayed_compare,delayed_compare,imul_compare,lmul_compare,fpcompare,cr_logical,delayed_cr,mfcr,mfcrf,mtcr,mfjmpr,mtjmpr,fp,fpsimple,dmul,sdiv,ddiv,ssqrt,dsqrt,jmpreg,brinc,vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,vecfloat,vecfdiv,vecdouble,isync,sync,load_l,store_c,shift,trap,insert_dword,var_shift_rotate,cntlz,exts,mffgpr,mftgpr,isel,popcnt,crypto,htm" +(define_attr "type" + "integer,two,three, + shift,var_shift_rotate,insert_word,insert_dword, + imul,imul2,imul3,lmul,idiv,ldiv, + exts,cntlz,popcnt,isel, + load,store,fpload,fpstore,vecload,vecstore, + cmp, + branch,jmpreg,mfjmpr,mtjmpr,trap,isync,sync,load_l,store_c, + compare,fast_compare,delayed_compare,var_delayed_compare, + imul_compare,lmul_compare, + cr_logical,delayed_cr,mfcr,mfcrf,mtcr, + fpcompare,fp,fpsimple,dmul,sdiv,ddiv,ssqrt,dsqrt, + brinc, + vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm, + vecfloat,vecfdiv,vecdouble,mffgpr,mftgpr,crypto, + htm" (const_string "integer")) ;; Does this instruction sign-extend its result?