diff mbox series

Fix PR tree-optimization/86066

Message ID 7510373.jgzfFFhZ1x@polaris
State New
Headers show
Series Fix PR tree-optimization/86066 | expand

Commit Message

Eric Botcazou June 6, 2018, 1:13 p.m. UTC 
process_store was wrongly bypassing a BIT_NOT_EXPR if there was a NOP_EXPR 
right after it in the SSA chain.

Tested on x86-64/Linux, applied on the mainline as obvious.


2018-06-06  Eric Botcazou  <ebotcazou@adacore.com>

	PR tree-optimization/86066
	* gimple-ssa-store-merging.c (process_store): Do not bypass BIT_NOT_EXPR
	for BIT_INSERT_EXPR stores.

2018-06-06  Eric Botcazou  <ebotcazou@adacore.com>

	* gcc.dg/torture/pr86066.c: New test.
diff mbox series

Patch

Index: gimple-ssa-store-merging.c
===================================================================
--- gimple-ssa-store-merging.c	(revision 261173)
+++ gimple-ssa-store-merging.c	(working copy)
@@ -4333,7 +4333,9 @@  pass_store_merging::process_store (gimpl
 	  && const_bitsize <= 64)
 	{
 	  /* Bypass a conversion to the bit-field type.  */
-	  if (is_gimple_assign (def_stmt) && CONVERT_EXPR_CODE_P (rhs_code))
+	  if (!bit_not_p
+	      && is_gimple_assign (def_stmt)
+	      && CONVERT_EXPR_CODE_P (rhs_code))
 	    {
 	      tree rhs1 = gimple_assign_rhs1 (def_stmt);
 	      if (TREE_CODE (rhs1) == SSA_NAME
@@ -4341,6 +4343,7 @@  pass_store_merging::process_store (gimpl
 		rhs = rhs1;
 	    }
 	  rhs_code = BIT_INSERT_EXPR;
+	  bit_not_p = false;
 	  ops[0].val = rhs;
 	  ops[0].base_addr = NULL_TREE;
 	  ops[1].base_addr = NULL_TREE;