From patchwork Mon Dec 8 14:18:07 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Segher Boessenkool X-Patchwork-Id: 418711 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 36EF01400DD for ; Tue, 9 Dec 2014 01:48:16 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; q=dns; s=default; b=CGBR7UGJXzd+BXAqWDM BYoUE8caSRY12SLbiVlGczgW+x33PHomGHerqpyIouAeW9KLZ3hTM+rnJGVTS3Ix oh8Tx0OVeFY51x/xUU4TJ3NfwSH2ulc/VlJ201NNdGUEGso1NA4TMhklrMkgyq2c 9tyLMFMNxBzv1iEe+2zuI+Yk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; s=default; bh=yhSN9UgKXdWaCz+HQqLvOFsoT Kg=; b=iBN3EipimnkLNjYCydL+ZT696yaa/YMGQDKTaAp5az2/0LHmuQBUqK2C9 HDhYW0B+oUXdJgOKdrWrLHI0ARgFd7R2kdF3Vn9cLGmRA2YYUQV2Hzkpr9IGrSNm Z5ScvCpRqGkk9WYvQfP0tkerHUydVtuLlAG+LslM7pugKWxCw4= Received: (qmail 25338 invoked by alias); 8 Dec 2014 14:47:23 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 25257 invoked by uid 89); 8 Dec 2014 14:47:22 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-2.0 required=5.0 tests=AWL, BAYES_00, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: gcc1-power7.osuosl.org Received: from gcc1-power7.osuosl.org (HELO gcc1-power7.osuosl.org) (140.211.15.137) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Mon, 08 Dec 2014 14:47:20 +0000 Received: from gcc1-power7.osuosl.org (localhost [127.0.0.1]) by gcc1-power7.osuosl.org (8.14.6/8.14.6) with ESMTP id sB8EIMT8033011; Mon, 8 Dec 2014 06:18:22 -0800 Received: (from segher@localhost) by gcc1-power7.osuosl.org (8.14.6/8.14.6/Submit) id sB8EIMQu032996; Mon, 8 Dec 2014 06:18:22 -0800 From: Segher Boessenkool To: gcc-patches@gcc.gnu.org Cc: dje.gcc@gmail.com, Segher Boessenkool Subject: [PATCH 06/10] rs6000: New add/subf carry insns Date: Mon, 8 Dec 2014 06:18:07 -0800 Message-Id: <72cecd52901018524525d156113b1be658917f6b.1418024189.git.segher@kernel.crashing.org> In-Reply-To: References: In-Reply-To: References: X-IsSubscribed: yes This implements addc, addic, adde, addze, addme, subfc, subfic, subfe, subfze, subfme. Some of those in multiple forms: canonical RTL for the "immediate" insns has four forms; subfX has a special form for subtracting a register from itself. All these new insns get type "add" for now. 2014-12-08 Segher Boessenkool gcc/ PR target/64180 * config/rs6000/predicates.md (adde_operand): New. * config/rs6000/rs6000.md (add3_carry): New. (add3_imm_carry_pos): New. (add3_imm_carry_0): New. (add3_imm_carry_m1): New. (add3_imm_carry_neg): New. (add3_carry_in): New. (add3_carry_in_0): New. (add3_carry_in_m1): New. (subf3_carry): New. (subf3_imm_carry_0): New. (subf3_imm_carry_m1): New. (subf3_carry_in): New. (subf3_carry_in_0): New. (subf3_carry_in_m1): New. (subf3_carry_in_xx): New. --- gcc/config/rs6000/predicates.md | 6 ++ gcc/config/rs6000/rs6000.md | 162 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 168 insertions(+) diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index ea230a5..a19cb2f 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -788,6 +788,12 @@ (define_predicate "add_operand" || satisfies_constraint_L (op)") (match_operand 0 "gpc_reg_operand"))) +;; Return 1 if the operand is either a non-special register, or 0, or -1. +(define_predicate "adde_operand" + (if_then_else (match_code "const_int") + (match_test "INTVAL (op) == 0 || INTVAL (op) == -1") + (match_operand 0 "gpc_reg_operand"))) + ;; Return 1 if OP is a constant but not a valid add_operand. (define_predicate "non_add_cint_operand" (and (match_code "const_int") diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index dcdb7c1..e23fadb 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -1634,6 +1634,96 @@ (define_split FAIL; }) + +(define_insn "add3_carry" + [(set (match_operand:P 0 "gpc_reg_operand" "=r") + (plus:P (match_operand:P 1 "gpc_reg_operand" "r") + (match_operand:P 2 "reg_or_short_operand" "rI"))) + (set (reg:P CA_REGNO) + (ltu:P (plus:P (match_dup 1) + (match_dup 2)) + (match_dup 1)))] + "" + "add%I2c %0,%1,%2" + [(set_attr "type" "add")]) + +(define_insn "*add3_imm_carry_pos" + [(set (match_operand:P 0 "gpc_reg_operand" "=r") + (plus:P (match_operand:P 1 "gpc_reg_operand" "r") + (match_operand:P 2 "short_cint_operand" "n"))) + (set (reg:P CA_REGNO) + (geu:P (match_dup 1) + (match_operand:P 3 "const_int_operand" "n")))] + "INTVAL (operands[2]) > 0 + && INTVAL (operands[2]) + INTVAL (operands[3]) == 0" + "addic %0,%1,%2" + [(set_attr "type" "add")]) + +(define_insn "*add3_imm_carry_0" + [(set (match_operand:P 0 "gpc_reg_operand" "=r") + (match_operand:P 1 "gpc_reg_operand" "r")) + (set (reg:P CA_REGNO) + (const_int 0))] + "" + "addic %0,%1,0" + [(set_attr "type" "add")]) + +(define_insn "*add3_imm_carry_m1" + [(set (match_operand:P 0 "gpc_reg_operand" "=r") + (plus:P (match_operand:P 1 "gpc_reg_operand" "r") + (const_int -1))) + (set (reg:P CA_REGNO) + (ne:P (match_dup 1) + (const_int 0)))] + "" + "addic %0,%1,-1" + [(set_attr "type" "add")]) + +(define_insn "*add3_imm_carry_neg" + [(set (match_operand:P 0 "gpc_reg_operand" "=r") + (plus:P (match_operand:P 1 "gpc_reg_operand" "r") + (match_operand:P 2 "short_cint_operand" "n"))) + (set (reg:P CA_REGNO) + (gtu:P (match_dup 1) + (match_operand:P 3 "const_int_operand" "n")))] + "INTVAL (operands[2]) < 0 + && INTVAL (operands[2]) + INTVAL (operands[3]) == -1" + "addic %0,%1,%2" + [(set_attr "type" "add")]) + + +(define_insn "add3_carry_in" + [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r") + (plus:GPR (plus:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r") + (match_operand:GPR 2 "adde_operand" "r,n")) + (reg:GPR CA_REGNO))) + (clobber (reg:GPR CA_REGNO))] + "" + "@ + adde %0,%1,%2 + add%G2e %0,%1" + [(set_attr "type" "add")]) + +(define_insn "add3_carry_in_0" + [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r") + (plus:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r") + (reg:GPR CA_REGNO))) + (clobber (reg:GPR CA_REGNO))] + "" + "addze %0,%1" + [(set_attr "type" "add")]) + +(define_insn "add3_carry_in_m1" + [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r") + (plus:GPR (plus:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r") + (reg:GPR CA_REGNO)) + (const_int -1))) + (clobber (reg:GPR CA_REGNO))] + "" + "addme %0,%1" + [(set_attr "type" "add")]) + + (define_expand "one_cmpl2" [(set (match_operand:SDI 0 "gpc_reg_operand" "") (not:SDI (match_operand:SDI 1 "gpc_reg_operand" "")))] @@ -1772,6 +1862,78 @@ (define_insn "subf3_imm" [(set_attr "type" "add")]) +(define_insn "subf3_carry" + [(set (match_operand:P 0 "gpc_reg_operand" "=r") + (minus:P (match_operand:P 2 "reg_or_short_operand" "rI") + (match_operand:P 1 "gpc_reg_operand" "r"))) + (set (reg:P CA_REGNO) + (leu:P (match_dup 1) + (match_dup 2)))] + "" + "subf%I2c %0,%1,%2" + [(set_attr "type" "add")]) + +(define_insn "*subf3_imm_carry_0" + [(set (match_operand:P 0 "gpc_reg_operand" "=r") + (neg:P (match_operand:P 1 "gpc_reg_operand" "r"))) + (set (reg:P CA_REGNO) + (eq:P (match_dup 1) + (const_int 0)))] + "" + "subfic %0,%1,0" + [(set_attr "type" "add")]) + +(define_insn "*subf3_imm_carry_m1" + [(set (match_operand:P 0 "gpc_reg_operand" "=r") + (not:P (match_operand:P 1 "gpc_reg_operand" "r"))) + (set (reg:P CA_REGNO) + (const_int 1))] + "" + "subfic %0,%1,-1" + [(set_attr "type" "add")]) + + +(define_insn "subf3_carry_in" + [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r") + (plus:GPR (plus:GPR (not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r")) + (reg:GPR CA_REGNO)) + (match_operand:GPR 2 "adde_operand" "r,n"))) + (clobber (reg:GPR CA_REGNO))] + "" + "@ + subfe %0,%1,%2 + subf%G2e %0,%1" + [(set_attr "type" "add")]) + +(define_insn "*subf3_carry_in_0" + [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") + (plus:GPR (not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")) + (reg:GPR CA_REGNO))) + (clobber (reg:GPR CA_REGNO))] + "" + "subfze %0,%1" + [(set_attr "type" "add")]) + +(define_insn "*subf3_carry_in_m1" + [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") + (plus:GPR (plus:GPR (not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")) + (reg:GPR CA_REGNO)) + (const_int -1))) + (clobber (reg:GPR CA_REGNO))] + "" + "subfme %0,%1" + [(set_attr "type" "add")]) + +(define_insn "subf3_carry_in_xx" + [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") + (plus:GPR (reg:GPR CA_REGNO) + (const_int -1))) + (clobber (reg:GPR CA_REGNO))] + "" + "subfe %0,%0,%0" + [(set_attr "type" "add")]) + + (define_expand "neg2" [(set (match_operand:SDI 0 "gpc_reg_operand" "") (neg:SDI (match_operand:SDI 1 "gpc_reg_operand" "")))]