From patchwork Sat May 16 04:50:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Pan2 via Gcc-patches" X-Patchwork-Id: 1291836 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gcc.gnu.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=KRSl1cuP; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49PCWy6gDqz9sTH for ; Sat, 16 May 2020 14:50:36 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 55B1B385DC00; Sat, 16 May 2020 04:50:31 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 55B1B385DC00 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1589604631; bh=DILFRVb6apvTf2dgyCdtQ10RSb2mofdqfGf5+WJWp/s=; h=Subject:To:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=KRSl1cuPzXiUzpMAekj6ECZf8xkEQnO3Jo7BIuuN2Sy1ivF8331wbl1CYPkuXc8tt EQz4UTgJKoVg395In+kJyFZ4W3esWg0cjY6mGB4WCLrW6rvafUrsUkRgdCZZsasjWI uZD3MTT3mD5D+7bYJYMYC1w1CsiQvoFVKw3kkDF0= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from us-smtp-1.mimecast.com (us-smtp-delivery-1.mimecast.com [205.139.110.120]) by sourceware.org (Postfix) with ESMTP id BF834385AC19 for ; Sat, 16 May 2020 04:50:27 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org BF834385AC19 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-148-UBj4CSgVNrezEG8ARy_H6A-1; Sat, 16 May 2020 00:50:25 -0400 X-MC-Unique: UBj4CSgVNrezEG8ARy_H6A-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 2E2A21800D42 for ; Sat, 16 May 2020 04:50:24 +0000 (UTC) Received: from ovpn-112-71.phx2.redhat.com (ovpn-112-71.phx2.redhat.com [10.3.112.71]) by smtp.corp.redhat.com (Postfix) with ESMTP id 04D6F5C220 for ; Sat, 16 May 2020 04:50:23 +0000 (UTC) Message-ID: <604c1e96c2631ffc43403df91fbebc032ebdb5ee.camel@redhat.com> Subject: [committed] Simplify and improve some H8 peepholes To: gcc-patches List Date: Fri, 15 May 2020 22:50:23 -0600 Organization: Red Hat User-Agent: Evolution 3.36.2 (3.36.2-1.fc32) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-13.4 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Jeff Law via Gcc-patches From: "Li, Pan2 via Gcc-patches" Reply-To: law@redhat.com Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" A couple minor improvements to the H8 port I spotted while doing the cc0->CC_REG transition. First is consolidation of 3 peepholes into a single peephole using a mode iterator. This has zero impact on the code we generate, but means fewer patterns that I ultimately have to convert. Second is two conceptual improvements to peepholes that combine stack allocations with stores into the stack by turning the store into a pre-decrement address mode. First, the peepholes should work just as well with SFmode as they do with SImode. So a new iterator is introduced so that we don't need separate patterns for SFmode. Second we failed to optimize stack adjustments of 8 bytes. If we use subs the sequence would take 8 bytes, but after the peephole it's just 6 bytes. This saves a few hundred bytes and makes it easier to compare the baseline against the converted port for regressions. I remove the clock counts -- they don't look right (perhaps they were for the original H8/300). jeff diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3ae73f21560..4f48d443235 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2020-05-15 Jeff Law + + * config/h8300/h8300.md (SFI iterator): New iterator for + SFmode and SImode. + * config/h8300/peepholes.md (memory comparison): Use mode + iterator to consolidate 3 patterns into one. + (stack allocation and stack store): Handle SFmode. Handle + 8 byte allocations. + 2020-05-15 Segher Boessenkool * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md index e9b598d375a..46ab2442576 100644 --- a/gcc/config/h8300/h8300.md +++ b/gcc/config/h8300/h8300.md @@ -191,6 +191,8 @@ (define_mode_iterator QHSIF [QI HI SI SF]) +(define_mode_iterator SFI [SF SI]) + (define_code_iterator shifts [ashift ashiftrt lshiftrt]) (define_code_iterator ors [ior xor]) diff --git a/gcc/config/h8300/peepholes.md b/gcc/config/h8300/peepholes.md index 9086bddcf57..a0f5af28a53 100644 --- a/gcc/config/h8300/peepholes.md +++ b/gcc/config/h8300/peepholes.md @@ -551,9 +551,9 @@ ;; Convert a memory comparison to a move if there is a scratch register. (define_peephole2 - [(match_scratch:QI 1 "r") + [(match_scratch:QHSI 1 "r") (set (cc0) - (compare (match_operand:QI 0 "memory_operand" "") + (compare (match_operand:QHSI 0 "memory_operand" "") (const_int 0)))] "" [(set (match_dup 1) @@ -562,31 +562,6 @@ (const_int 0)))] "") -(define_peephole2 - [(match_scratch:HI 1 "r") - (set (cc0) - (compare (match_operand:HI 0 "memory_operand" "") - (const_int 0)))] - "" - [(set (match_dup 1) - (match_dup 0)) - (set (cc0) (compare (match_dup 1) - (const_int 0)))] - "") - -(define_peephole2 - [(match_scratch:SI 1 "r") - (set (cc0) - (compare (match_operand:SI 0 "memory_operand" "") - (const_int 0)))] - "" - [(set (match_dup 1) - (match_dup 0)) - (set (cc0) (compare (match_dup 1) - (const_int 0)))] - "") - - ;; (compare (reg:HI) (const_int)) takes 4 bytes, so we try to achieve ;; the equivalent with shorter sequences. Here is the summary. Cases ;; are grouped for each define_peephole2. @@ -1418,31 +1393,48 @@ ;; stack adjustment of -4, generate one push ;; -;; before : 6 bytes, 10 clocks -;; after : 4 bytes, 10 clocks +;; before : 6 bytes +;; after : 4 bytes (define_peephole2 [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int -4))) - (set (mem:SI (reg:SI SP_REG)) - (match_operand:SI 0 "register_operand" ""))] + (set (mem:SFI (reg:SI SP_REG)) + (match_operand:SFI 0 "register_operand" ""))] "!TARGET_NORMAL_MODE && REGNO (operands[0]) != SP_REG" - [(set (mem:SI (pre_dec:SI (reg:SI SP_REG))) - (match_dup 0))] - "") + [(set (mem:SFI (pre_dec:SI (reg:SI SP_REG))) + (match_dup 0))]) + +;; stack adjustment of -8, generate one push +;; +;; before : 8 bytes +;; after : 6 bytes + +(define_peephole2 + [(set (reg:SI SP_REG) + (plus:SI (reg:SI SP_REG) + (const_int -8))) + (set (mem:SFI (reg:SI SP_REG)) + (match_operand:SFI 0 "register_operand" ""))] + "!TARGET_NORMAL_MODE && REGNO (operands[0]) != SP_REG" + [(set (reg:SI SP_REG) + (plus:SI (reg:SI SP_REG) + (const_int -4))) + (set (mem:SFI (pre_dec:SI (reg:SI SP_REG))) + (match_dup 0))]) ;; stack adjustment of -12, generate one push ;; -;; before : 10 bytes, 14 clocks -;; after : 8 bytes, 14 clocks +;; before : 10 bytes +;; after : 8 bytes (define_peephole2 [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int -12))) - (set (mem:SI (reg:SI SP_REG)) - (match_operand:SI 0 "register_operand" ""))] + (set (mem:SFI (reg:SI SP_REG)) + (match_operand:SFI 0 "register_operand" ""))] "!TARGET_NORMAL_MODE && REGNO (operands[0]) != SP_REG" [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) @@ -1450,9 +1442,8 @@ (set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int -4))) - (set (mem:SI (pre_dec:SI (reg:SI SP_REG))) - (match_dup 0))] - "") + (set (mem:SFI (pre_dec:SI (reg:SI SP_REG))) + (match_dup 0))]) ;; Transform ;;