From patchwork Fri Dec 11 13:55:01 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nathan Sidwell X-Patchwork-Id: 555767 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 2E692140518 for ; Sat, 12 Dec 2015 00:55:14 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=QtW6xAPT; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; q=dns; s=default; b=J2h/uLFoXELdcyQrEAnpe/Xd57JaFA9bR3EnyIYIfEP+v0jBzM XzTauObb1f2oLqjs3/FRk8V5t8mYQbzrdKYDKR+LACkxgFwVNdjDQvrEhKS7rS+S 4vq6RmaytAuQdb9hLJvISL8Xf0oeVK8kNXzWAbVDteOQEw4GMl2vZN6O0= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; s= default; bh=YkWze/kcd1RLDNLpb/Vxq+dToeo=; b=QtW6xAPT2gUeb/g3XpIH u8AWkTGyN5cw6kD6gEtSDhSil5/6VxuinfsLT1mGSJUjOhZvRbizZ9WlIFaGdV77 4j+0lDGDAZk1SwmCpb8/naUQG7GbI+2C7Bv+hEvGttL35Kxijy4tYDjorFHJUNWD hyxKIFdpwSuemSb+Ghh+phE= Received: (qmail 53862 invoked by alias); 11 Dec 2015 13:55:07 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 53843 invoked by uid 89); 11 Dec 2015 13:55:06 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=BAYES_00, FREEMAIL_FROM, KAM_ASCII_DIVIDERS, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=no version=3.3.2 X-HELO: mail-qg0-f50.google.com Received: from mail-qg0-f50.google.com (HELO mail-qg0-f50.google.com) (209.85.192.50) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Fri, 11 Dec 2015 13:55:05 +0000 Received: by qgef78 with SMTP id f78so7531672qge.0 for ; Fri, 11 Dec 2015 05:55:02 -0800 (PST) X-Received: by 10.140.136.134 with SMTP id 128mr14727797qhi.16.1449842102841; Fri, 11 Dec 2015 05:55:02 -0800 (PST) Received: from ?IPv6:2601:181:c000:c497:a2a8:cdff:fe3e:b48? ([2601:181:c000:c497:a2a8:cdff:fe3e:b48]) by smtp.googlemail.com with ESMTPSA id x76sm1489771qhb.48.2015.12.11.05.55.02 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 11 Dec 2015 05:55:02 -0800 (PST) To: GCC Patches From: Nathan Sidwell Subject: [PTX] TImode initializers Message-ID: <566AD5B5.6020307@acm.org> Date: Fri, 11 Dec 2015 08:55:01 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 I noticed a C++ test ICE the compiler trying to output a 128bit enum initializer. The fix is crazy simple -- have nvptx_assemble_initializer return false rather than ICE. Defining SUPPORTS_WIDE_INT is helpful, but not necessary. While adding the testcase, I noticed I'd missed the opening '{' of the exiting dg-final lines, so they weren't being run. fixed that up while I was there. nathan 2015-12-11 Nathan Sidwell gcc/ * config/nvptx/nvptx.h (TARGET_SUPPORTS_WIDE_INT): Define. * config/nvptx/nvptx.c (nvptxx_assemble_integer): Return false for unrecognizable RTX. gcc/testsuite/ * gcc.target/nvptx/ary-init.c: Repair dg_final syntax. * gcc.target/nvptx/decl-init.c: Likewise. Add TI case. Index: gcc/config/nvptx/nvptx.c =================================================================== --- gcc/config/nvptx/nvptx.c (revision 231563) +++ gcc/config/nvptx/nvptx.c (working copy) @@ -1570,7 +1570,9 @@ nvptx_assemble_integer (rtx x, unsigned switch (GET_CODE (x)) { default: - gcc_unreachable (); + /* Let the generic machinery figure it out, usually for a + CONST_WIDE_INT. */ + return false; case CONST_INT: nvptx_assemble_value (INTVAL (x), size); Index: gcc/config/nvptx/nvptx.h =================================================================== --- gcc/config/nvptx/nvptx.h (revision 231563) +++ gcc/config/nvptx/nvptx.h (working copy) @@ -69,6 +69,7 @@ #define FLOAT_TYPE_SIZE 32 #define DOUBLE_TYPE_SIZE 64 #define LONG_DOUBLE_TYPE_SIZE 64 +#define TARGET_SUPPORTS_WIDE_INT 1 #undef SIZE_TYPE #define SIZE_TYPE (TARGET_ABI64 ? "long unsigned int" : "unsigned int") Index: gcc/testsuite/gcc.target/nvptx/ary-init.c =================================================================== --- gcc/testsuite/gcc.target/nvptx/ary-init.c (revision 231563) +++ gcc/testsuite/gcc.target/nvptx/ary-init.c (working copy) @@ -1,21 +1,25 @@ /* { dg-additional-options "-Wno-long-long" } */ char ca1[2] = {'a', 'b'}; +/* { dg-final { scan-assembler " .align 1 .u8 ca1\\\[2\\\] = { 97, 98 };" } } */ + short sa1[2] = { 1, 2 }; +/* { dg-final { scan-assembler " .align 2 .u16 sa1\\\[2\\\] = { 1, 2 };" } } */ + int ia1[2] = { 3, 4 }; +/* { dg-final { scan-assembler " .align 4 .u32 ia1\\\[2\\\] = { 3, 4 };" } } */ + long long la1[2] = { 5, 6 }; +/* { dg-final { scan-assembler " .align 8 .u64 la1\\\[2\\\] = { 5, 6 };" } } */ char ca2[2][2] = {'A', 'B', 'C', 'D'}; +/* { dg-final { scan-assembler " .align 1 .u8 ca2\\\[4\\\] = { 65, 66, 67, 68 };" } } */ + short sa2[2][2] = { 7, 8, 9, 10 }; +/* { dg-final { scan-assembler " .align 2 .u16 sa2\\\[4\\\] = { 7, 8, 9, 10 };" } } */ + int ia2[2][2] = { 11, 12, 13, 14 }; -long long la2[2][2] = { 15, 16, 17, 18 }; +/* { dg-final { scan-assembler " .align 4 .u32 ia2\\\[4\\\] = { 11, 12, 13, 14 };" } } */ -/* dg-final { scan-assembler " .align 8 .u64 la1\\\[2\\\] = { 5, 6 };" } } */ -/* dg-final { scan-assembler " .align 4 .u32 ia1\\\[2\\\] = { 3, 4 };" } } */ -/* dg-final { scan-assembler " .align 2 .u16 sa1\\\[2\\\] = { 1, 2 };" } } */ -/* dg-final { scan-assembler " .align 1 .u8 ca1\\\[2\\\] = { 97, 98 };" } } */ - -/* dg-final { scan-assembler " .align 8 .u64 la2\\\[4\\\] = { 15, 16, 17, 18 };" } } */ -/* dg-final { scan-assembler " .align 4 .u32 ia2\\\[4\\\] = { 11, 12, 13, 14 };" } } */ -/* dg-final { scan-assembler " .align 2 .u16 sa2\\\[4\\\] = { 7, 8, 9, 10 };" } } */ -/* dg-final { scan-assembler " .align 1 .u8 ca2\\\[4\\\] = { 65, 66, 67, 68 };" } } */ +long long la2[2][2] = { 15, 16, 17, 18 }; +/* { dg-final { scan-assembler " .align 8 .u64 la2\\\[4\\\] = { 15, 16, 17, 18 };" } } */ Index: gcc/testsuite/gcc.target/nvptx/decl-init.c =================================================================== --- gcc/testsuite/gcc.target/nvptx/decl-init.c (revision 231563) +++ gcc/testsuite/gcc.target/nvptx/decl-init.c (working copy) @@ -2,11 +2,15 @@ /* { dg-additional-options "-Wno-long-long" } */ __extension__ _Complex float cf = 1.0f + 2.0if; +/* { dg-final { scan-assembler ".align 4 .u32 cf\\\[2\\\] = { 1065353216, 1073741824 };" } } */ + __extension__ _Complex double cd = 3.0 + 4.0i; +/* { dg-final { scan-assembler ".align 8 .u64 cd\\\[2\\\] = { 4613937818241073152, 4616189618054758400 };" } } */ long long la[2] = {0x0102030405060708ll, 0x1112131415161718ll}; +/* { dg-final { scan-assembler ".align 8 .u64 la\\\[2\\\] = { 72623859790382856, 1230066625199609624 };" } } */ struct six { @@ -15,23 +19,27 @@ struct six }; struct six six1 = {1, 2, 3}; +/* { dg-final { scan-assembler ".align 2 .u16 six1\\\[3\\\] = { 1, 2, 3 };" } } */ + struct six six2[2] = {{4, 5, 6}, {7, 8, 9}}; +/* { dg-final { scan-assembler ".align 2 .u16 six2\\\[6\\\] = { 4, 5, 6, 7, 8, 9 };" } } */ struct __attribute__((packed)) five { char a; int b; }; + struct five five1 = {10, 11}; +/* { dg-final { scan-assembler ".align 1 .u8 five1\\\[5\\\] = { 10, 11, 0, 0, 0 };" } } */ + struct five five2[2] = {{12, 13}, {14, 15}}; +/* { dg-final { scan-assembler ".align 1 .u8 five2\\\[10\\\] = { 12, 13, 0, 0, 0, 14, 15, 0, 0, 0 };" } } */ + +int __attribute__((vector_size(16))) vi = {16, 17, 18, 19}; +/* { dg-final { scan-assembler ".align 8 .u32 vi\\\[4\\\] = { 16, 17, 18, 19 };" } } */ -int __attribute__((vector_size(16))) vi = {16, 17, 18, 19}; +typedef int __attribute ((mode(TI))) ti_t; -/* dg-final { scan-assembler ".align 4 .u32 cf\\\[2\\\] = { 1065353216, 1073741824 };" } } */ -/* dg-final { scan-assembler ".align 8 .u64 df\\\[2\\\] = { 4613937818241073152, 4616189618054758400 };" } } */ -/* dg-final { scan-assembler ".align 8 .u64 la\\\[2\\\] = { 72623859790382856, 1230066625199609624 };" } } */ -/* dg-final { scan-assembler ".align 2 .u16 six1\\\[3\\\] = { 1, 2, 3 };" } } */ -/* dg-final { scan-assembler ".align 2 .u16 six2\\\[6\\\] = { 4, 5, 6, 7, 8, 9 };" } } */ -/* dg-final { scan-assembler ".align 1 .u8 five1\\\[5\\\] = { 10, 11, 0, 0, 0 };" } } */ -/* dg-final { scan-assembler ".align 1 .u8 five2\\\[10\\\] = { 12, 13, 0, 0, 0, 14, 15, 0, 0, 0 };" } } */ -/* dg-final { scan-assembler ".align 8 .u32 vi\\\[4\\\] = { 16, 17, 18, 19 };" } } */ +ti_t ti = (ti_t)0x2122232425262728ll + ((ti_t)0x3132333435363738ll << 64); +/* { dg-final { scan-assembler ".align 8 .u64 ti\\\[2\\\] = { 2387509390608836392, 3544952156018063160 };" } } */