From patchwork Thu Nov 27 15:32:18 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Renlin Li X-Patchwork-Id: 415570 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3ADBB14012A for ; Fri, 28 Nov 2014 02:32:35 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:references :in-reply-to:content-type; q=dns; s=default; b=brA5CVGLAHzk0WBcj LwozMJWbjQbBkGklz2asODscdmQ8i42ERFPQdyOtXJKBkejnRel8UYSerqKGZl5s 7J1ygN3uB1LWUrWunI+flFQHhhpN8Ne48c4luOMggMSgJLIDifdI2hcSU1Nokjos 6OJkPtH2SJpp09XwW2HBmQkncM= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:references :in-reply-to:content-type; s=default; bh=1orIkANVOXMLn7ylc76jz7+ wvo0=; b=Ngy8an5gU+yAW/oKq58Kf9dM/7J65cWMrt6rpzB6Osj8o7ZjOrb1afp 8vKNMqxA6PfW+2lag1OGdVFH+8R8f8oofviQG2r/+8BtJOti6mxR0SmQfi1noG/s L74unK1KOHyKmW1jRvLFhMRHYdYEGplxkWps8gUFN45//0Ra7+6o= Received: (qmail 14606 invoked by alias); 27 Nov 2014 15:32:27 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 14593 invoked by uid 89); 27 Nov 2014 15:32:27 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL, BAYES_00, SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 27 Nov 2014 15:32:23 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by service87.mimecast.com; Thu, 27 Nov 2014 15:32:20 +0000 Received: from [10.1.203.158] ([10.1.255.212]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 27 Nov 2014 15:32:19 +0000 Message-ID: <54774402.10403@arm.com> Date: Thu, 27 Nov 2014 15:32:18 +0000 From: Renlin Li User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.1.2 MIME-Version: 1.0 To: "H.J. Lu" CC: "gcc-patches@gcc.gnu.org" , Vladimir Makarov , Ramana Radhakrishnan Subject: Re: [Ping]Re: [PR63762][4.9] Backport the patch which fixes "GCC generates UNPREDICTABLE STR with Rn = Rt for arm" References: <546E141C.9070906@arm.com> <5475C29E.9090209@arm.com> <54761769.3040200@arm.com> In-Reply-To: X-MC-Unique: 114112715322002401 X-IsSubscribed: yes On 26/11/14 18:12, H.J. Lu wrote: > On Wed, Nov 26, 2014 at 10:09 AM, Renlin Li wrote: >> On 26/11/14 12:16, H.J. Lu wrote: >>> On Wed, Nov 26, 2014 at 4:07 AM, Renlin Li wrote: >>>> On 20/11/14 16:17, Renlin Li wrote: >>>>> Hi all, >>>>> >>>>> This is a backport for gcc-4_9-branch of the patch "[PR63762]GCC >>>>> generates >>>>> UNPREDICTABLE STR with Rn = Rt for arm" posted in: >>>>> https://gcc.gnu.org/ml/gcc-patches/2014-11/msg02253.html >>>>> >>>>> arm-none-eabi has been test on the model, no new issues. bootstrapping >>>>> and >>>>> regression tested on x86, no new issues. >>>>> >>>>> Is it Okay for gcc-4_9-branch? >>>>> >>>>> gcc/ChangeLog: >>>>> >>>>> 2014-11-20 Renlin Li >>>>> >>>>> PR middle-end/63762 >>>>> * ira.c (ira): Update preferred class. >>>>> >>>>> gcc/testsuite/ChangeLog: >>>>> >>>>> 2014-11-20 Renlin Li >>>>> >>>>> PR middle-end/63762 >>>>> * gcc.dg/pr63762.c: New. >>>> Ping for it. >>>> >>> Please verify if it is the real fix for >>> >>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63661 >>> >>> If yes, please add a testcase for PR 63661 and mention it in >>> your ChangeLog entry. >>> >>> Thanks. >>> >>> >> Hi H.J. >> >> Yes, I have verified that, this patch additionally fixes PR 63661. >> >> I observed the same behaviour as I saw on arm backend. It will be great if >> you can double check they are caused by exactly the same reason. > I will ask our people to take a look. > >> >> A new testcase has been added, ChangeLog has been updated to reflect the >> change. Updated patch has bee attached. >> Okay for gcc-4_9-branch? >> >> Regards, >> Renlin Li >> >> >> gcc/ChangeLog: >> >> 2014-11-26 Renlin Li >> >> PR middle-end/63762 >> PR middle-end/63661 >> * ira.c (ira): Update preferred class. >> >> gcc/testsuite/ChangeLog: >> >> 2014-11-26 Renlin Li >> >> PR middle-end/63661 >> PR middle-end/63762 >> * testsuite/gcc.dg/pr63661.c: New. >> * testsuite/gcc.dg/pr63762.c: New. >> >> > pr63661.c should be moved to gcc.target/i386 and run it > on PIC target. > > Thanks. > Hi H.J. The patch has been adjusted according to your suggestion. gcc/ChangeLog: 2014-11-27 Renlin Li PR middle-end/63762 PR target/63661 * ira.c (ira): Update preferred class. gcc/testsuite/ChangeLog: 2014-11-27 Renlin Li PR middle-end/63762 PR target/63661 * testsuite/gcc.dg/pr63762.c: New. * testsuite/gcc.target/i386/pr63661.c: New. diff --git a/gcc/ira.c b/gcc/ira.c index 4d91d21..0c703c5 100644 --- a/gcc/ira.c +++ b/gcc/ira.c @@ -5347,7 +5347,18 @@ ira (FILE *f) ira_allocno_iterator ai; FOR_EACH_ALLOCNO (a, ai) - ALLOCNO_REGNO (a) = REGNO (ALLOCNO_EMIT_DATA (a)->reg); + { + int old_regno = ALLOCNO_REGNO (a); + int new_regno = REGNO (ALLOCNO_EMIT_DATA (a)->reg); + + ALLOCNO_REGNO (a) = new_regno; + + if (old_regno != new_regno) + setup_reg_classes (new_regno, reg_preferred_class (old_regno), + reg_alternate_class (old_regno), + reg_allocno_class (old_regno)); + } + } else { diff --git a/gcc/testsuite/gcc.dg/pr63762.c b/gcc/testsuite/gcc.dg/pr63762.c new file mode 100644 index 0000000..df11067 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr63762.c @@ -0,0 +1,77 @@ +/* PR middle-end/63762 */ +/* { dg-do assemble } */ +/* { dg-options "-O2" } */ + +#include + +void *astFree (); +void *astMalloc (); +void astNegate (void *); +int astGetNegated (void *); +void astGetRegionBounds (void *, double *, double *); +int astResampleF (void *, ...); + +extern int astOK; + +int +MaskF (int inside, int ndim, const int lbnd[], const int ubnd[], + float in[], float val) +{ + + void *used_region; + float *c, *d, *out, *tmp_out; + double *lbndgd, *ubndgd; + int *lbndg, *ubndg, idim, ipix, nax, nin, nout, npix, npixg, result = 0; + if (!astOK) return result; + lbndg = astMalloc (sizeof (int)*(size_t) ndim); + ubndg = astMalloc (sizeof (int)*(size_t) ndim); + lbndgd = astMalloc (sizeof (double)*(size_t) ndim); + ubndgd = astMalloc (sizeof (double)*(size_t) ndim); + if (astOK) + { + astGetRegionBounds (used_region, lbndgd, ubndgd); + npix = 1; + npixg = 1; + for (idim = 0; idim < ndim; idim++) + { + lbndg[ idim ] = lbnd[ idim ]; + ubndg[ idim ] = ubnd[ idim ]; + npix *= (ubnd[ idim ] - lbnd[ idim ] + 1); + if (npixg >= 0) npixg *= (ubndg[ idim ] - lbndg[ idim ] + 1); + } + if (npixg <= 0 && astOK) + { + if ((inside != 0) == (astGetNegated( used_region ) != 0)) + { + c = in; + for (ipix = 0; ipix < npix; ipix++) *(c++) = val; + result = npix; + } + } + else if (npixg > 0 && astOK) + { + if ((inside != 0) == (astGetNegated (used_region) != 0)) + { + tmp_out = astMalloc (sizeof (float)*(size_t) npix); + if (tmp_out) + { + c = tmp_out; + for (ipix = 0; ipix < npix; ipix++) *(c++) = val; + result = npix - npixg; + } + out = tmp_out; + } + else + { + tmp_out = NULL; + out = in; + } + if (inside) astNegate (used_region); + result += astResampleF (used_region, ndim, lbnd, ubnd, in, NULL, + NULL, NULL, 0, 0.0, 100, val, ndim, + lbnd, ubnd, lbndg, ubndg, out, NULL); + if (inside) astNegate (used_region); + } + } + return result; +} diff --git a/gcc/testsuite/gcc.target/i386/pr63661.c b/gcc/testsuite/gcc.target/i386/pr63661.c new file mode 100644 index 0000000..8b55146 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr63661.c @@ -0,0 +1,77 @@ +/* PR target/63661 */ +/* { dg-do run } */ +/* { dg-require-effective-target fpic } */ +/* { dg-options "-mtune=nehalem -fPIC -O2" } */ + +static void __attribute__((noinline,noclone,hot)) +foo (double a, double q, double *ff, double *gx, int e, int ni) +{ + union + { + double n; + unsigned long long o; + } punner; + + punner.n = q; + __builtin_printf("B: 0x%016llx ---- %g\n", punner.o, q); + + if(q != 5) + __builtin_abort(); +} + +static int __attribute__((noinline,noclone,hot)) +bar (int order, double q, double c[]) +{ + int ni, nn, i, e; + double g2, x2, de, s, ratio, ff; + + nn = 0; + e = order & 1; + s = 0; + ratio = 0; + x2 = 0; + g2 = 0; + + if(q == 0.0) + return 0; + + if (order < 5) + { + ratio = 1.0 / q; + nn = order; + } + + ni = -nn; + + while(1) + { + de = ratio - g2 - x2; + + foo (0, q, &ff, &g2, e, ni); + + if((int)de == 0) + break; + } + + s += 2 * nn * c[nn]; + + for (i = 0; i < 1; i++) + { + c[0] = nn; + for (; i < 10; i++) + c[i] = 0.0; + c[0] /= s; + } + + return 0; +} + +int +main () +{ + double c[1000]; + + __builtin_printf("A: 0x%016llx\n", (unsigned long long)c); + bar (1, 5.0, c); + return 0; +}