diff mbox

[PR61446] Fix mode for register copy in REE pass

Message ID 539B2987.3000702@redhat.com
State New
Headers show

Commit Message

Jeff Law June 13, 2014, 4:40 p.m. UTC 
On 06/11/14 15:45, Ilya Enkovich wrote:
> On 11 Jun 22:47, Uros Bizjak wrote:
>>
>> This should read:
>>
>> /* { dg-do compile { target { ia32 } } } */
>> /* { dg-options "-O2 -march=corei7 -mfpmath=387" } */
>>
>> The x86 part is OK with this change.
>>
>> Uros.
>
> Thanks for comment!  Here is a fixed version.
>
> Ilya
> --
> gcc/
>
> 2014-06-11  Ilya Enkovich  <ilya.enkovich@intel.com>
>
> 	PR 61446
> 	* ree.c (find_and_remove_re): Narrow mode for register copy
> 	if required.
>
> gcc/testsuite/
>
> 2014-06-11  Ilya Enkovich  <ilya.enkovich@intel.com>
>
> 	 * gcc.target/i386/pr61446.c : New.
As I outlined yesterday, the right approach is to fix the code in 
combine_reaching_defs which is supposed to detect this kind of problem 
and avoid optimizing that case.

That's what this patch does.  Bootstrapped and regression tested on 
x86_64-unknown-linux-gnu.

I've installed my patch and your testcase on the trunk.  I'll backport 
to 4.9 shortly.
commit 6fc9d987b3f68335f149018c4ea521334daa5971
Author: Jeff Law <law@redhat.com>
Date:   Fri Jun 13 10:38:17 2014 -0600

    2014-06-13  Jeff Law  <law@redhat.com>
    
    	PR rtl-optimization/61094
    	PR rtl-optimization/61446
    	* ree.c (combine_reaching_defs): Get the mode for the copy from
    	the extension insn rather than the defining insn.
    
    2014-06-13  Ilya Enkovich  <ilya.enkovich@intel.com>
    
    	PR rtl-optimization/61094
    	PR rtl-optimization/61446
    	* gcc.target/i386/pr61446.c : New.
diff mbox

Patch

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1999831..5454423 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@ 
+2014-06-13  Jeff Law  <law@redhat.com>
+
+	PR rtl-optimization/61094
+	PR rtl-optimization/61446
+	* ree.c (combine_reaching_defs): Get the mode for the copy from
+	the extension insn rather than the defining insn.
+
 2014-06-13  Dehao Chen  <dehao@google.com>
 
 	* dwarf2out.c (add_linkage_name): Emit more linkage name.
diff --git a/gcc/ree.c b/gcc/ree.c
index ade413e..f4bb4cc 100644
--- a/gcc/ree.c
+++ b/gcc/ree.c
@@ -787,13 +787,16 @@  combine_reaching_defs (ext_cand *cand, const_rtx set_pat, ext_state *state)
 	 generated more than one insn.
 
          This generates garbage since we throw away the insn when we're
-	 done, only to recreate it later if this test was successful.  */
+	 done, only to recreate it later if this test was successful. 
+
+	 Make sure to get the mode from the extension (cand->insn).  This
+	 is different than in the code to emit the copy as we have not
+	 modified the defining insn yet.  */
       start_sequence ();
-      rtx sub_rtx = *get_sub_rtx (def_insn);
       rtx pat = PATTERN (cand->insn);
-      rtx new_dst = gen_rtx_REG (GET_MODE (SET_DEST (sub_rtx)),
+      rtx new_dst = gen_rtx_REG (GET_MODE (SET_DEST (pat)),
                                  REGNO (XEXP (SET_SRC (pat), 0)));
-      rtx new_src = gen_rtx_REG (GET_MODE (SET_DEST (sub_rtx)),
+      rtx new_src = gen_rtx_REG (GET_MODE (SET_DEST (pat)),
                                  REGNO (SET_DEST (pat)));
       emit_move_insn (new_dst, new_src);
 
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 262c682..1b63a2d 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@ 
+2014-06-13  Ilya Enkovich  <ilya.enkovich@intel.com>
+
+	PR rtl-optimization/61094
+	PR rtl-optimization/61446
+	* gcc.target/i386/pr61446.c : New.
+
 2014-06-13  Dehao Chen  <dehao@google.com>
 
 	* g++.dg/debug/dwarf2/cdtor-1.C: Update test result.
diff --git a/gcc/testsuite/gcc.target/i386/pr61446.c b/gcc/testsuite/gcc.target/i386/pr61446.c
new file mode 100644
index 0000000..fc32f63
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr61446.c
@@ -0,0 +1,14 @@ 
+/* PR rtl-optimization/61446 */
+
+/* { dg-do compile { target { ia32 } } } */
+/* { dg-options "-O2 -march=corei7 -mfpmath=387" } */
+
+unsigned long long
+foo (float a)
+{
+  const double dfa = a;
+  const unsigned int hi = dfa / 0x1p32f;
+  const unsigned int lo = dfa - (double) hi * 0x1p32f;
+
+  return ((unsigned long long) hi << (4 * (8))) | lo;
+}