===================================================================
@@ -3274,7 +3274,7 @@ lra-constraints.o : lra-constraints.c $(
$(TM_H) $(RTL_H) $(REGS_H) insn-config.h insn-codes.h $(DF_H) \
$(RECOG_H) output.h addresses.h $(REGS_H) hard-reg-set.h $(FLAGS_H) \
$(FUNCTION_H) $(EXPR_H) $(BASIC_BLOCK_H) $(TM_P_H) $(EXCEPT_H) \
- ira.h rtl-error.h $(LRA_INT_H)
+ ira.h rtl-error.h $(PARAMS_H) $(LRA_INT_H)
lra-eliminations.o : lra-eliminations.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \
$(TM_H) $(RTL_H) $(REGS_H) insn-config.h $(DF_H) \
$(RECOG_H) output.h $(REGS_H) hard-reg-set.h $(FLAGS_H) $(FUNCTION_H) \
===================================================================
@@ -5531,10 +5531,10 @@ legitimate_lo_sum_address_p (enum machin
return false;
if (GET_MODE_NUNITS (mode) != 1)
return false;
- if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
+ if (! lra_in_progress && GET_MODE_SIZE (mode) > UNITS_PER_WORD
&& !(/* ??? Assume floating point reg based on mode? */
TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT
- && (mode == DFmode || mode == DDmode || mode == TFmode)))
+ && (mode == DFmode || mode == DDmode)))
return false;
return CONSTANT_P (x) || toc_ok_p;
@@ -7139,7 +7139,11 @@ rs6000_emit_move (rtx dest, rtx source,
regno = ira_class_hard_regs[cl][0];
}
if (FP_REGNO_P (regno))
- emit_insn (gen_movsd_store (operands[0], operands[1]));
+ {
+ if (GET_MODE (operands[0]) != DDmode)
+ operands[0] = gen_rtx_SUBREG (DDmode, operands[0], 0);
+ emit_insn (gen_movsd_store (operands[0], operands[1]));
+ }
else if (INT_REGNO_P (regno))
emit_insn (gen_movsd_hardfloat (operands[0], operands[1]));
else
@@ -7165,7 +7169,11 @@ rs6000_emit_move (rtx dest, rtx source,
regno = ira_class_hard_regs[cl][0];
}
if (FP_REGNO_P (regno))
- emit_insn (gen_movsd_load (operands[0], operands[1]));
+ {
+ if (GET_MODE (operands[1]) != DDmode)
+ operands[1] = gen_rtx_SUBREG (DDmode, operands[1], 0);
+ emit_insn (gen_movsd_load (operands[0], operands[1]));
+ }
else if (INT_REGNO_P (regno))
emit_insn (gen_movsd_hardfloat (operands[0], operands[1]));
else
===================================================================
@@ -9549,6 +9549,13 @@ considered for data dependence analysis.
handled by the optimizations using loop data dependencies.
The default value is 1000.
+@item lra-ebb-probability
+Inheritance and register live-range splitting are done by LRA in
+extended basic block scope (@dfn{EBB}). EBB is formed on basis of
+probability in percents of transition from one basic block to the next
+basic block. The parameter defines minimal probability to add a basic
+block to EBB being formed. The default value is 50.
+
@item max-vartrack-size
Sets a maximum number of hash table slots to use during variable
tracking dataflow analysis of any function. If this limit is exceeded
===================================================================
@@ -129,6 +129,7 @@
#include "df.h"
#include "ira.h"
#include "rtl-error.h"
+#include "params.h"
#include "lra-int.h"
/* Value of LRA_CURR_RELOAD_NUM at the beginning of BB of the current
@@ -4711,7 +4712,7 @@ inherit_in_ebb (rtx head, rtx tail)
/* This value affects EBB forming. If probability of edge from EBB to
a BB is not greater than the following value, we don't add the BB
to EBB. */
-#define EBB_PROBABILITY_CUTOFF (REG_BR_PROB_BASE / 2)
+#define EBB_PROBABILITY_CUTOFF ((REG_BR_PROB_BASE * LRA_EBB_PROBABILITY) / 100)
/* Current number of inheritance/split iteration. */
int lra_inheritance_iter;
===================================================================
@@ -2213,6 +2213,10 @@ lra (FILE *f)
timevar_push (TV_LRA);
+ /* Make sure that the last insn is a note. Some subsequent passes
+ need it. */
+ emit_note (NOTE_INSN_DELETED);
+
COPY_HARD_REG_SET (lra_no_alloc_regs, ira_no_alloc_regs);
init_reg_info ();
===================================================================
@@ -837,6 +837,11 @@ DEFPARAM (PARAM_LOOP_INVARIANT_MAX_BBS_I
"Max basic blocks number in loop for loop invariant motion",
10000, 0, 0)
+DEFPARAM (PARAM_LRA_EBB_PROBABILITY,
+ "lra-ebb-probability",
+ "Min. probability to add BB to EBB being formed for inheritance and splitting",
+ 50, 0, 100)
+
/* Avoid SLP vectorization of large basic blocks. */
DEFPARAM (PARAM_SLP_MAX_INSNS_IN_BB,
"slp-max-insns-in-bb",
===================================================================
@@ -197,6 +197,8 @@ extern void init_param_values (int *para
PARAM_VALUE (PARAM_IRA_MAX_CONFLICT_TABLE_SIZE)
#define IRA_LOOP_RESERVED_REGS \
PARAM_VALUE (PARAM_IRA_LOOP_RESERVED_REGS)
+#define LRA_EBB_PROBABILITY \
+ PARAM_VALUE (PARAM_LRA_EBB_PROBABILITY)
#define SWITCH_CONVERSION_BRANCH_RATIO \
PARAM_VALUE (PARAM_SWITCH_CONVERSION_BRANCH_RATIO)
#define LOOP_INVARIANT_MAX_BBS_IN_LOOP \
The following patch fixes most GCC testsuite regressions on PPC64 for LRA (now there are only 2 failed tests in comparison with reload. the tests expect a specific assembler code and LRA generates a bit different code). The patch also adds a parameter can be used to form EBB in which inheritance and live range splitting are done. The patch was successfully bootstrapped on x86/x86-64 and ppc64. Committed as rev. 194489. 2012-12-13 Vladimir Makarov <vmakarov@redhat.com> * params.def (PARAM_LRA_EBB_PROBABILITY): New param. * params.h (LRA_EBB_PROBABILITY): New. * Makefile.in (lra-constraints.c): Add dependence on $(PARAMS_H). * doc/invoke.texi (lra-ebb-probability): Describe. * lra-constraints.c: Include "params.h". (EBB_PROBABILITY_CUTOFF): Redefine through LRA_EBB_PROBABILITY. * config/rs6000/rs6000.c (legitimate_lo_sum_address_p): Permit modes bigger word for LRA. (rs6000_emit_move): Generate subreg for LRA if it is necessary. Remove TFmode as it was before. * lra.c (lra): Add note at the end of RTL code.