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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 4 Dec 2018 15:00:20 -0000 Received: from b03ledav005.gho.boulder.ibm.com (b03ledav005.gho.boulder.ibm.com [9.17.130.236]) by b03cxnp08027.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id wB4F0J1c5701740 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 4 Dec 2018 15:00:19 GMT Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A2DA7BE04F; Tue, 4 Dec 2018 15:00:19 +0000 (GMT) Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 500B8BE062; Tue, 4 Dec 2018 15:00:19 +0000 (GMT) Received: from oc3272150783.ibm.com (unknown [9.41.247.5]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTPS; Tue, 4 Dec 2018 15:00:19 +0000 (GMT) To: gcc-patches@gcc.gnu.org, Segher Boessenkool From: Paul Clarke Subject: [PATCH 3/3][rs6000] Enable x86-compat vector intrinsics testing Date: Tue, 4 Dec 2018 09:00:18 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 x-cbid: 18120415-0004-0000-0000-000014BCFD2A X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00010170; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000270; SDB=6.01126889; UDB=6.00585278; IPR=6.00907024; MB=3.00024442; MTD=3.00000008; XFM=3.00000015; UTC=2018-12-04 15:00:21 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18120415-0005-0000-0000-000089BC8692 Message-Id: <4d64efdb-637d-7c4c-ac7f-bed526e3a689@us.ibm.com> The testsuite tests for the compatibility implementations of x86 vector intrinsics for "powerpc" had been inadvertently made to PASS without actually running the test code. This patch removes the code which kept the tests from running the actual test code. 2018-12-03 Paul A. Clarke [gcc/testsuite] PR target/88316 * gcc.target/powerpc/bmi-check.h: Remove test for __BUILTIN_CPU_SUPPORTS__, thereby enabling test code to run. * gcc.target/powerpc/bmi2-check.h: Likewise. * gcc.target/powerpc/mmx-check.h: Likewise. * gcc.target/powerpc/sse-check.h: Likewise. * gcc.target/powerpc/sse2-check.h: Likewise. * gcc.target/powerpc/sse3-check.h: Likewise. * gcc.target/powerpc/ssse3-check.h: Likewise. --- PC Index: gcc/testsuite/gcc.target/powerpc/bmi-check.h =================================================================== diff --git a/trunk/gcc/testsuite/gcc.target/powerpc/bmi-check.h b/trunk/gcc/testsuite/gcc.target/powerpc/bmi-check.h --- a/trunk/gcc/testsuite/gcc.target/powerpc/bmi-check.h (revision 266157) +++ b/trunk/gcc/testsuite/gcc.target/powerpc/bmi-check.h (working copy) @@ -13,19 +13,9 @@ do_test (void) int main () { -#ifdef __BUILTIN_CPU_SUPPORTS__ - /* Need 64-bit for 64-bit longs as single instruction. */ - if ( __builtin_cpu_supports ("ppc64") ) - { - do_test (); + do_test (); #ifdef DEBUG - printf ("PASSED\n"); + printf ("PASSED\n"); #endif - } -#ifdef DEBUG - else - printf ("SKIPPED\n"); -#endif -#endif /* __BUILTIN_CPU_SUPPORTS__ */ return 0; } Index: gcc/testsuite/gcc.target/powerpc/bmi2-check.h =================================================================== diff --git a/trunk/gcc/testsuite/gcc.target/powerpc/bmi2-check.h b/trunk/gcc/testsuite/gcc.target/powerpc/bmi2-check.h --- a/trunk/gcc/testsuite/gcc.target/powerpc/bmi2-check.h (revision 266157) +++ b/trunk/gcc/testsuite/gcc.target/powerpc/bmi2-check.h (working copy) @@ -13,22 +13,10 @@ do_test (void) int main () { -#ifdef __BUILTIN_CPU_SUPPORTS__ - /* The BMI2 test for pext test requires the Bit Permute doubleword - (bpermd) instruction added in PowerISA 2.06 along with the VSX - facility. So we can test for arch_2_06. */ - if ( __builtin_cpu_supports ("arch_2_06") ) - { - do_test (); + do_test (); #ifdef DEBUG - printf ("PASSED\n"); + printf ("PASSED\n"); #endif - } -#ifdef DEBUG - else - printf ("SKIPPED\n"); -#endif -#endif /* __BUILTIN_CPU_SUPPORTS__ */ return 0; } Index: gcc/testsuite/gcc.target/powerpc/mmx-check.h =================================================================== diff --git a/trunk/gcc/testsuite/gcc.target/powerpc/mmx-check.h b/trunk/gcc/testsuite/gcc.target/powerpc/mmx-check.h --- a/trunk/gcc/testsuite/gcc.target/powerpc/mmx-check.h (revision 266157) +++ b/trunk/gcc/testsuite/gcc.target/powerpc/mmx-check.h (working copy) @@ -13,23 +13,9 @@ do_test (void) int main () { -#ifdef __BUILTIN_CPU_SUPPORTS__ - /* Many MMX intrinsics are simpler / faster to implement by - transferring the __m64 (long int) to vector registers for SIMD - operations. To be efficient we also need the direct register - transfer instructions from POWER8. So we can test for - arch_2_07. */ - if ( __builtin_cpu_supports ("arch_2_07") ) - { - do_test (); + do_test (); #ifdef DEBUG - printf ("PASSED\n"); + printf ("PASSED\n"); #endif - } -#ifdef DEBUG - else - printf ("SKIPPED\n"); -#endif -#endif /* __BUILTIN_CPU_SUPPORTS__ */ return 0; } Index: gcc/testsuite/gcc.target/powerpc/sse-check.h =================================================================== diff --git a/trunk/gcc/testsuite/gcc.target/powerpc/sse-check.h b/trunk/gcc/testsuite/gcc.target/powerpc/sse-check.h --- a/trunk/gcc/testsuite/gcc.target/powerpc/sse-check.h (revision 266157) +++ b/trunk/gcc/testsuite/gcc.target/powerpc/sse-check.h (working copy) @@ -1,7 +1,7 @@ #include #include "m128-check.h" -#define DEBUG 1 +// #define DEBUG 1 #define TEST sse_test @@ -17,25 +17,10 @@ do_test (void) int main () { -#ifdef __BUILTIN_CPU_SUPPORTS__ - /* Most SSE intrinsic operations can be implemented via VMX - instructions, but some operations may be faster / simpler - using the POWER8 VSX instructions. This is especially true - when we are transferring / converting to / from __m64 types. - The direct register transfer instructions from POWER8 are - especially important. So we test for arch_2_07. */ - if ( __builtin_cpu_supports ("arch_2_07") ) - { - do_test (); + do_test (); #ifdef DEBUG - printf ("PASSED\n"); + printf ("PASSED\n"); #endif - } -#ifdef DEBUG - else - printf ("SKIPPED\n"); -#endif -#endif /* __BUILTIN_CPU_SUPPORTS__ */ return 0; } Index: gcc/testsuite/gcc.target/powerpc/sse2-check.h =================================================================== diff --git a/trunk/gcc/testsuite/gcc.target/powerpc/sse2-check.h b/trunk/gcc/testsuite/gcc.target/powerpc/sse2-check.h --- a/trunk/gcc/testsuite/gcc.target/powerpc/sse2-check.h (revision 266157) +++ b/trunk/gcc/testsuite/gcc.target/powerpc/sse2-check.h (working copy) @@ -9,8 +9,6 @@ /* define DEBUG replace abort with printf on error. */ //#define DEBUG 1 -#if 1 - #define TEST sse2_test static void sse2_test (void); @@ -25,28 +23,9 @@ do_test (void) int main () { -#ifdef __BUILTIN_CPU_SUPPORTS__ - /* Most SSE2 (vector double) intrinsic operations require VSX - instructions, but some operations may need only VMX - instructions. This also true for SSE2 scalar doubles as they - imply that "other half" of the vector remains unchanged or set - to zeros. The VSX scalar operations leave ther "other half" - undefined, and require additional merge operations. - Some conversions (to/from integer) need the direct register - transfer instructions from POWER8 for best performance. - So we test for arch_2_07. */ - if ( __builtin_cpu_supports ("arch_2_07") ) - { - do_test (); + do_test (); #ifdef DEBUG - printf ("PASSED\n"); + printf ("PASSED\n"); #endif - } -#ifdef DEBUG - else - printf ("SKIPPED\n"); -#endif -#endif /* __BUILTIN_CPU_SUPPORTS__ */ return 0; } -#endif Index: gcc/testsuite/gcc.target/powerpc/sse3-check.h =================================================================== diff --git a/trunk/gcc/testsuite/gcc.target/powerpc/sse3-check.h b/trunk/gcc/testsuite/gcc.target/powerpc/sse3-check.h --- a/trunk/gcc/testsuite/gcc.target/powerpc/sse3-check.h (revision 266157) +++ b/trunk/gcc/testsuite/gcc.target/powerpc/sse3-check.h (working copy) @@ -20,24 +20,9 @@ do_test (void) int main () { -#ifdef __BUILTIN_CPU_SUPPORTS__ - /* Most SSE intrinsic operations can be implemented via VMX - instructions, but some operations may be faster / simpler - using the POWER8 VSX instructions. This is especially true - when we are transferring / converting to / from __m64 types. - The direct register transfer instructions from POWER8 are - especially important. So we test for arch_2_07. */ - if (__builtin_cpu_supports ("arch_2_07")) - { - do_test (); + do_test (); #ifdef DEBUG - printf ("PASSED\n"); + printf ("PASSED\n"); #endif - } -#ifdef DEBUG - else - printf ("SKIPPED\n"); -#endif -#endif /* __BUILTIN_CPU_SUPPORTS__ */ return 0; } Index: gcc/testsuite/gcc.target/powerpc/ssse3-check.h =================================================================== diff --git a/trunk/gcc/testsuite/gcc.target/powerpc/ssse3-check.h b/trunk/gcc/testsuite/gcc.target/powerpc/ssse3-check.h --- a/trunk/gcc/testsuite/gcc.target/powerpc/ssse3-check.h (revision 266157) +++ b/trunk/gcc/testsuite/gcc.target/powerpc/ssse3-check.h (working copy) @@ -19,24 +19,9 @@ do_test (void) int main () { -#ifdef __BUILTIN_CPU_SUPPORTS__ - /* Most SSE intrinsic operations can be implemented via VMX - instructions, but some operations may be faster / simpler - using the POWER8 VSX instructions. This is especially true - when we are transferring / converting to / from __m64 types. - The direct register transfer instructions from POWER8 are - especially important. So we test for arch_2_07. */ - if (__builtin_cpu_supports ("arch_2_07")) - { - do_test (); + do_test (); #ifdef DEBUG - printf ("PASSED\n"); + printf ("PASSED\n"); #endif - } -#ifdef DEBUG - else - printf ("SKIPPED\n"); -#endif -#endif /* __BUILTIN_CPU_SUPPORTS__ */ return 0; }