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[Committed,AVR] : Addendum to fix thinko in PR49687

Message ID 4E329B41.9030303@gjlay.de
State New
Headers show

Commit Message

Georg-Johann Lay July 29, 2011, 11:36 a.m. UTC 
http://gcc.gnu.org/ml/gcc-patches/2011-07/msg02391.html

(reg:DI 18) does not cover (reg:HI 26) which also contributes to
the register footprint of implicit libgcc calls.

I should return to elementary school and learn counting again...

Installed as obvious, passed without regressions.

http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=176923

Johann

	PR target/49687
	* config/avr/avr.md (mulsi3, *mulsi3, mulu<mode>si3,
	muls<mode>si3, mulohisi3, mulhisi3, umulhisi3, usmulhisi3,
	*<any_extend:extend_prefix><any_extend2:extend_prefix>mul<QIHI:mode><QIHI2:mode>si3):
	Add X to register footprint: Clobber r26/r27.
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Patch

Index: config/avr/avr.md
===================================================================
--- config/avr/avr.md	(revision 176920)
+++ config/avr/avr.md	(working copy)
@@ -1373,6 +1373,7 @@  (define_expand "mulsi3"
   [(parallel [(set (match_operand:SI 0 "register_operand" "")
                    (mult:SI (match_operand:SI 1 "register_operand" "")
                             (match_operand:SI 2 "nonmemory_operand" "")))
+              (clobber (reg:HI 26))
               (clobber (reg:DI 18))])]
   "AVR_HAVE_MUL"
   {
@@ -1395,6 +1396,7 @@  (define_insn_and_split "*mulsi3"
   [(set (match_operand:SI 0 "pseudo_register_operand"                      "=r")
         (mult:SI (match_operand:SI 1 "pseudo_register_operand"              "r")
                  (match_operand:SI 2 "pseudo_register_or_const_int_operand" "rn")))
+   (clobber (reg:HI 26))
    (clobber (reg:DI 18))]
   "AVR_HAVE_MUL && !reload_completed"
   { gcc_unreachable(); }
@@ -1431,6 +1433,7 @@  (define_insn_and_split "mulu<mode>si3"
   [(set (match_operand:SI 0 "pseudo_register_operand"                           "=r")
         (mult:SI (zero_extend:SI (match_operand:QIHI 1 "pseudo_register_operand" "r"))
                  (match_operand:SI 2 "pseudo_register_or_const_int_operand"      "rn")))
+   (clobber (reg:HI 26))
    (clobber (reg:DI 18))]
   "AVR_HAVE_MUL && !reload_completed"
   { gcc_unreachable(); }
@@ -1466,6 +1469,7 @@  (define_insn_and_split "muls<mode>si3"
   [(set (match_operand:SI 0 "pseudo_register_operand"                           "=r")
         (mult:SI (sign_extend:SI (match_operand:QIHI 1 "pseudo_register_operand" "r"))
                  (match_operand:SI 2 "pseudo_register_or_const_int_operand"      "rn")))
+   (clobber (reg:HI 26))
    (clobber (reg:DI 18))]
   "AVR_HAVE_MUL && !reload_completed"
   { gcc_unreachable(); }
@@ -1509,6 +1513,7 @@  (define_insn_and_split "mulohisi3"
         (mult:SI (not:SI (zero_extend:SI 
                           (not:HI (match_operand:HI 1 "pseudo_register_operand" "r"))))
                  (match_operand:SI 2 "pseudo_register_or_const_int_operand"     "rn")))
+   (clobber (reg:HI 26))
    (clobber (reg:DI 18))]
   "AVR_HAVE_MUL && !reload_completed"
   { gcc_unreachable(); }
@@ -1528,6 +1533,7 @@  (define_expand "mulhisi3"
   [(parallel [(set (match_operand:SI 0 "register_operand" "")
                    (mult:SI (sign_extend:SI (match_operand:HI 1 "register_operand" ""))
                             (sign_extend:SI (match_operand:HI 2 "register_operand" ""))))
+              (clobber (reg:HI 26))
               (clobber (reg:DI 18))])]
   "AVR_HAVE_MUL"
   "")
@@ -1536,6 +1542,7 @@  (define_expand "umulhisi3"
   [(parallel [(set (match_operand:SI 0 "register_operand" "")
                    (mult:SI (zero_extend:SI (match_operand:HI 1 "register_operand" ""))
                             (zero_extend:SI (match_operand:HI 2 "register_operand" ""))))
+              (clobber (reg:HI 26))
               (clobber (reg:DI 18))])]
   "AVR_HAVE_MUL"
   "")
@@ -1544,6 +1551,7 @@  (define_expand "usmulhisi3"
   [(parallel [(set (match_operand:SI 0 "register_operand" "")
                    (mult:SI (zero_extend:SI (match_operand:HI 1 "register_operand" ""))
                             (sign_extend:SI (match_operand:HI 2 "register_operand" ""))))
+              (clobber (reg:HI 26))
               (clobber (reg:DI 18))])]
   "AVR_HAVE_MUL"
   "")
@@ -1557,6 +1565,7 @@  (define_insn_and_split
   [(set (match_operand:SI 0 "pseudo_register_operand"                            "=r")
         (mult:SI (any_extend:SI (match_operand:QIHI 1 "pseudo_register_operand"   "r"))
                  (any_extend2:SI (match_operand:QIHI2 2 "pseudo_register_operand" "r"))))
+   (clobber (reg:HI 26))
    (clobber (reg:DI 18))]
   "AVR_HAVE_MUL && !reload_completed"
   { gcc_unreachable(); }