From patchwork Mon Mar 21 16:55:55 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aldy Hernandez X-Patchwork-Id: 87802 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id DC4581007D1 for ; Tue, 22 Mar 2011 03:56:44 +1100 (EST) Received: (qmail 3346 invoked by alias); 21 Mar 2011 16:56:13 -0000 Received: (qmail 3199 invoked by uid 22791); 21 Mar 2011 16:56:08 -0000 X-SWARE-Spam-Status: No, hits=-6.5 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_HI, SPF_HELO_PASS, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 21 Mar 2011 16:55:57 +0000 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p2LGtuCK031506 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Mon, 21 Mar 2011 12:55:56 -0400 Received: from houston.quesejoda.com (vpn-229-124.phx2.redhat.com [10.3.229.124]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id p2LGttBC029210; Mon, 21 Mar 2011 12:55:55 -0400 Message-ID: <4D87831B.7080800@redhat.com> Date: Mon, 21 Mar 2011 11:55:55 -0500 From: Aldy Hernandez User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.15) Gecko/20110307 Fedora/3.1.9-0.39.b3pre.fc14 Lightning/1.0b3pre Thunderbird/3.1.9 MIME-Version: 1.0 To: gcc-patches , Jakub Jelinek Subject: [cxx-mem-model] test invalid bitfield twiddling Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org This test is inspired by PR 48124. [Jakub, let me know if you find any additional variations on this theme.] In the C++ memory model, non contiguous bitfields are distinct memory locations and cannot be accessed by and/or magic if we introduce data races. In the test below, we can trigger invalid bit twiddling by declaring a bit field as volatile and then accessing it. On x86-64, we end up using a 32-bit access which ends up touching the rest of the fields. Unfortunately, I can't come up with a suitable test without the volatile-- I guess that's a good thing (either that, or my bit twiddle skills are lacking). Committing to branch. p.s. Oh yeah, I found some small buglets in the harness which are fixed below. testsuite/ * lib/gcc-memmodel-gdb-test.exp: Return if no executable. * gcc.dg/memmodel/memmodel.h (memmodel_done): Add noinline attribute. * g++.dg/memmodel/bitfields.C: New. Index: testsuite/lib/gcc-memmodel-gdb-test.exp =================================================================== --- testsuite/lib/gcc-memmodel-gdb-test.exp (revision 170852) +++ testsuite/lib/gcc-memmodel-gdb-test.exp (working copy) @@ -35,6 +35,10 @@ proc memmodel-gdb-test { } { set exec_file "[file rootname [file tail $prog]].exe" set cmd_file "$testsuite_dir/gcc.dg/memmodel/memmodel.gdb" + if ![file exists $exec_file] { + return + } + send_log "Spawning: $gdb_name -nx -nw -quiet -x $cmd_file ./$exec_file\n" set res [remote_spawn target "$gdb_name -nx -nw -x $cmd_file ./$exec_file"] if { $res < 0 || $res == "" } { Index: testsuite/gcc.dg/memmodel/memmodel.h =================================================================== --- testsuite/gcc.dg/memmodel/memmodel.h (revision 170852) +++ testsuite/gcc.dg/memmodel/memmodel.h (working copy) @@ -1,6 +1,6 @@ int memmodel_fini = 0; -void +void __attribute__((noinline)) memmodel_done () { memmodel_fini = 1; Index: testsuite/g++.dg/memmodel/bitfields.C =================================================================== --- testsuite/g++.dg/memmodel/bitfields.C (revision 0) +++ testsuite/g++.dg/memmodel/bitfields.C (revision 0) @@ -0,0 +1,73 @@ +/* { dg-do link } */ +/* { dg-options "-O2 --param allow-load-data-races=0 --param allow-store-data-races=0" } */ +/* { dg-final { memmodel-gdb-test } } */ + +/* Test that setting does not touch either or . + In the C++ memory model, non contiguous bitfields ("a" and "c" + here) should be considered as distinct memory locations, so we + can't use bit twiddling to set either one. */ + +#include +#include "memmodel.h" + +#define CONSTA 12 + +static int global; +struct S +{ + /* On x86-64, the volatile causes us to access with a 32-bit + access, and thus trigger this test. */ + volatile unsigned int a : 4; + + unsigned char b; + unsigned int c : 6; +} var; + +void set_a() +{ + var.a = CONSTA; +} + +void memmodel_other_threads() +{ + ++global; + var.b = global; + var.c = global; +} + +int memmodel_step_verify() +{ + int ret = 0; + if (var.b != global) + { + printf ("FAIL: Unexpected value: var.b is %d, should be %d\n", + var.b, global); + ret = 1; + } + if (var.c != global) + { + printf ("FAIL: Unexpected value: var.c is %d, should be %d\n", + var.c, global); + ret = 1; + } + return ret; +} + +int memmodel_final_verify() +{ + int ret = memmodel_step_verify(); + if (var.a != CONSTA) + { + printf ("FAIL: Unexpected value: var.a is %d, should be %d\n", + var.a, CONSTA); + ret = 1; + } + return ret; +} + +int main() +{ + set_a(); + memmodel_done(); + return 0; +}