From patchwork Wed Jul 7 05:46:54 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Zhang X-Patchwork-Id: 58079 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 07F70B6EFE for ; Wed, 7 Jul 2010 15:47:06 +1000 (EST) Received: (qmail 6326 invoked by alias); 7 Jul 2010 05:47:04 -0000 Received: (qmail 6316 invoked by uid 22791); 7 Jul 2010 05:47:03 -0000 X-SWARE-Spam-Status: No, hits=-2.0 required=5.0 tests=AWL, BAYES_00, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 07 Jul 2010 05:46:58 +0000 Received: (qmail 11225 invoked from network); 7 Jul 2010 05:46:56 -0000 Received: from unknown (HELO ?192.168.0.124?) (jie@127.0.0.2) by mail.codesourcery.com with ESMTPA; 7 Jul 2010 05:46:56 -0000 Message-ID: <4C3414CE.8010606@codesourcery.com> Date: Wed, 07 Jul 2010 13:46:54 +0800 From: Jie Zhang User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.4) Gecko/20100608 Lightning/1.0b2 Thunderbird/3.1 MIME-Version: 1.0 To: gcc-patches@gcc.gnu.org Subject: [ARM] Fix prologue and epilogue for interrupt function X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org ARM GCC will save r3 to the stack when it tries to align the stack to double-word. But it can only do so when r3 will not be saved. Otherwise there will be inconsistent information about how many registers will be saved and how much the stack will be adjusted. This patch fixes it. Tested on arm-none-eabi. No regressions are found. Is it OK? Regards, * config/arm/arm.c (arm_get_frame_offsets): Don't use r3 to align the stack when it's going to be saved. testsuite/ * gcc.target/arm/interrupt-1.c: New test. * gcc.target/arm/interrupt-2.c: New test. Index: testsuite/gcc.target/arm/interrupt-1.c =================================================================== --- testsuite/gcc.target/arm/interrupt-1.c (revision 0) +++ testsuite/gcc.target/arm/interrupt-1.c (revision 0) @@ -0,0 +1,13 @@ +/* Verify that prologue and epilogue are correct for functions with + __attribute__ ((interrupt)). */ +/* { dg-do compile } */ +/* { dg-options "-O0" } */ +extern void bar (int); +extern void foo (void) __attribute__ ((interrupt("IRQ"))); + +void foo () +{ + bar (0); +} +/* { dg-final { scan-assembler "stmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, lr}" } } */ +/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, pc}\\^" } } */ Index: testsuite/gcc.target/arm/interrupt-2.c =================================================================== --- testsuite/gcc.target/arm/interrupt-2.c (revision 0) +++ testsuite/gcc.target/arm/interrupt-2.c (revision 0) @@ -0,0 +1,16 @@ +/* Verify that prologue and epilogue are correct for functions with + __attribute__ ((interrupt)). */ +/* { dg-do compile } */ +/* { dg-options "-O1" } */ +extern void bar (int); +extern void test (void) __attribute__((__interrupt__)); + +int foo; +void test() +{ + funcptrs(foo); + foo = 0; +} + +/* { dg-final { scan-assembler "stmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, lr}" } } */ +/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, pc}\\^" } } */ Index: config/arm/arm.c =================================================================== --- config/arm/arm.c (revision 161865) +++ config/arm/arm.c (working copy) @@ -14690,7 +14690,8 @@ arm_get_frame_offsets (void) generates better code on Thumb-2 by avoiding the need to use 32-bit push/pop instructions. */ if (!crtl->tail_call_emit - && arm_size_return_regs () <= 12) + && arm_size_return_regs () <= 12 + && (offsets->saved_regs_mask & (1 << 3)) == 0) { reg = 3; }