diff mbox series

[v2] rs6000: Disable MMA if no VSX support [PR103627]

Message ID 497284df-e67f-8071-7001-8074633ecc01@linux.ibm.com
State New
Headers show
Series [v2] rs6000: Disable MMA if no VSX support [PR103627] | expand

Commit Message

Kewen.Lin Jan. 27, 2022, 11:21 a.m. UTC 
Hi,

As PR103627 shows, there is an unexpected case where !TARGET_VSX
and TARGET_MMA co-exist.  As ISA3.1 claims, SIMD is a requirement
for MMA.  By looking into the ICE, I noticed that the current
MMA implementation depends on vector pairs load/store which use
VSX register, but we don't have a separated option to control
Power10 vector support and Segher pointed out "-mpower9-vector is
a workaround that should go away" and more explanations in [1].
So comparing to v1[2], this patch makes MMA require VSX instead.

Bootstrapped and regtested on powerpc64le-linux-gnu P9 & P10 and
powerpc64-linux-gnu P8.

Is it ok for trunk?

[1] https://gcc.gnu.org/pipermail/gcc-patches/2022-January/589303.html
[2] https://gcc.gnu.org/pipermail/gcc-patches/2021-December/587310.html

BR,
Kewen
-----
gcc/ChangeLog:

	PR target/103627
	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Disable
	MMA if !TARGET_VSX.

gcc/testsuite/ChangeLog:

	PR target/103627
	* gcc.target/powerpc/pr103627-1.c: New test.
	* gcc.target/powerpc/pr103627-2.c: New test.
---
 gcc/config/rs6000/rs6000.cc                   | 10 ++++++++++
 gcc/testsuite/gcc.target/powerpc/pr103627-1.c | 16 ++++++++++++++++
 gcc/testsuite/gcc.target/powerpc/pr103627-2.c | 16 ++++++++++++++++
 3 files changed, 42 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/pr103627-1.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/pr103627-2.c

Comments

Segher Boessenkool Jan. 27, 2022, 5:17 p.m. UTC | #1 
Hi!

On Thu, Jan 27, 2022 at 07:21:33PM +0800, Kewen.Lin wrote:
> 	PR target/103627
> 	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Disable
> 	MMA if !TARGET_VSX.
> 
> gcc/testsuite/ChangeLog:
> 
> 	PR target/103627
> 	* gcc.target/powerpc/pr103627-1.c: New test.
> 	* gcc.target/powerpc/pr103627-2.c: New test.

Okay for trunk.  Thanks!


Segher
Kewen.Lin Feb. 7, 2022, 5:54 a.m. UTC | #2 
on 2022/1/28 上午1:17, Segher Boessenkool wrote:
> Hi!
> 
> On Thu, Jan 27, 2022 at 07:21:33PM +0800, Kewen.Lin wrote:
>> 	PR target/103627
>> 	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Disable
>> 	MMA if !TARGET_VSX.
>>
>> gcc/testsuite/ChangeLog:
>>
>> 	PR target/103627
>> 	* gcc.target/powerpc/pr103627-1.c: New test.
>> 	* gcc.target/powerpc/pr103627-2.c: New test.
> 
> Okay for trunk.  Thanks!
> 
> 


Thanks Segher!  Commit it as r12-7078 and its successor as r12-7079.

Since it's related to MMA support, I guess we want to backport it?

If so, is it ok to backport to GCC 10 and 11 after one week or so?


BR,
Kewen
Segher Boessenkool Feb. 7, 2022, 8:35 a.m. UTC | #3 
On Mon, Feb 07, 2022 at 01:54:00PM +0800, Kewen.Lin wrote:
> on 2022/1/28 上午1:17, Segher Boessenkool wrote:
> > On Thu, Jan 27, 2022 at 07:21:33PM +0800, Kewen.Lin wrote:
> >> 	PR target/103627
> >> 	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Disable
> >> 	MMA if !TARGET_VSX.
> >>
> >> gcc/testsuite/ChangeLog:
> >>
> >> 	PR target/103627
> >> 	* gcc.target/powerpc/pr103627-1.c: New test.
> >> 	* gcc.target/powerpc/pr103627-2.c: New test.
> > 
> > Okay for trunk.  Thanks!
> 
> Thanks Segher!  Commit it as r12-7078 and its successor as r12-7079.
> 
> Since it's related to MMA support, I guess we want to backport it?

Probably, yes.  (Not because it is related to MMA, but more because the
ICE will also exist on older compilers).

> If so, is it ok to backport to GCC 10 and 11 after one week or so?

Okay.  Thanks!


Segher
diff mbox series

Patch

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index a07db3a48bc..634937e052f 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -4491,6 +4491,16 @@  rs6000_option_override_internal (bool global_init_p)
       rs6000_isa_flags &= ~OPTION_MASK_MMA;
     }
 
+  /* MMA requires SIMD support as ISA 3.1 claims and our implementation
+     such as "*movoo" uses vector pair access which use VSX registers.
+     So make MMA require VSX support here.  */
+  if (TARGET_MMA && !TARGET_VSX)
+    {
+      if ((rs6000_isa_flags_explicit & OPTION_MASK_MMA) != 0)
+	error ("%qs requires %qs", "-mmma", "-mvsx");
+      rs6000_isa_flags &= ~OPTION_MASK_MMA;
+    }
+
   if (!TARGET_PCREL && TARGET_PCREL_OPT)
     rs6000_isa_flags &= ~OPTION_MASK_PCREL_OPT;
 
diff --git a/gcc/testsuite/gcc.target/powerpc/pr103627-1.c b/gcc/testsuite/gcc.target/powerpc/pr103627-1.c
new file mode 100644
index 00000000000..5cecf515e58
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr103627-1.c
@@ -0,0 +1,16 @@ 
+/* { dg-require-effective-target power10_ok } */
+/* { dg-options "-mdejagnu-cpu=power10 -mno-vsx" } */
+
+/* Verify compiler emits error message instead of ICE.  */
+
+extern float *dest;
+extern __vector_quad src;
+
+int
+foo ()
+{
+  __builtin_mma_disassemble_acc (dest, &src);
+  /* { dg-error "'__builtin_mma_disassemble_acc' requires the '-mmma' option" "" { target *-*-* } .-1 } */
+  return 0;
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/pr103627-2.c b/gcc/testsuite/gcc.target/powerpc/pr103627-2.c
new file mode 100644
index 00000000000..89ae4f607bf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr103627-2.c
@@ -0,0 +1,16 @@ 
+/* { dg-require-effective-target power10_ok } */
+/* { dg-options "-mdejagnu-cpu=power10 -mmma -mno-vsx" } */
+
+/* Verify the emitted error message.  */
+
+extern float *dest;
+extern __vector_quad src;
+
+int
+foo ()
+{
+  __builtin_mma_disassemble_acc (dest, &src);
+  /* { dg-error "'-mmma' requires '-mvsx'" "mma" { target *-*-* } 0 } */
+  return 0;
+}
+