| Message ID | 44982686-81ea-196d-0025-789742add0b8@redhat.com |
|---|---|
| State | New |
| Headers | show |
| Series | One more patch for PR91333 | expand |
Hi Vladimir, This patch increases code size at -Os on arm-linux-gnueabihf by 1% (with no code-size reductions) on several SPEC CPU2006 benchmarks: 400.perlbench,perlbench_base.default ,580842,583842 429.mcf,mcf_base.default ,7867,7955 403.gcc,gcc_base.default ,1726449,1736149 433.milc,milc_base.default ,66328,66816 456.hmmer,hmmer_base.default ,148394,149434 482.sphinx3,sphinx_livepretend_base.default ,99183,99863 Could you look into whether these regressions can be avoided? Thanks, -- Maxim Kuvyrkov https://www.linaro.org > On Feb 2, 2020, at 7:46 PM, Vladimir Makarov <vmakarov@redhat.com> wrote: > > The previous patch for > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91333 > > resulted in aarch64 testsuite failures. > > The following patch solves some of the failures and modified the PR test as the generated code changed. > > The patch was successfully bootstrapped on x86-64 and benchmarked on SPEC2000. > > > <pr91333-2.patch>
On 2/17/20 10:08 AM, Maxim Kuvyrkov wrote: > Hi Vladimir, > > This patch increases code size at -Os on arm-linux-gnueabihf by 1% (with no code-size reductions) on several SPEC CPU2006 benchmarks: > > 400.perlbench,perlbench_base.default ,580842,583842 > 429.mcf,mcf_base.default ,7867,7955 > 403.gcc,gcc_base.default ,1726449,1736149 > 433.milc,milc_base.default ,66328,66816 > 456.hmmer,hmmer_base.default ,148394,149434 > 482.sphinx3,sphinx_livepretend_base.default ,99183,99863 > > Could you look into whether these regressions can be avoided? > Sure, Maxim. I'll look into it. If I can not solve the problem, I probably revert the patch.
> On Feb 18, 2020, at 6:30 PM, Vladimir Makarov <vmakarov@redhat.com> wrote: > > On 2/17/20 10:08 AM, Maxim Kuvyrkov wrote: >> Hi Vladimir, >> >> This patch increases code size at -Os on arm-linux-gnueabihf by 1% (with no code-size reductions) on several SPEC CPU2006 benchmarks: >> >> 400.perlbench,perlbench_base.default ,580842,583842 >> 429.mcf,mcf_base.default ,7867,7955 >> 403.gcc,gcc_base.default ,1726449,1736149 >> 433.milc,milc_base.default ,66328,66816 >> 456.hmmer,hmmer_base.default ,148394,149434 >> 482.sphinx3,sphinx_livepretend_base.default ,99183,99863 >> >> Could you look into whether these regressions can be avoided? >> > Sure, Maxim. I'll look into it. If I can not solve the problem, I probably revert the patch. Thanks, Vladimir. Forgot to mention that this is for Thumb2 (--target=arm-linux-gnueabihf --with-mode=thumb). Regards, -- Maxim Kuvyrkov https://www.linaro.org
On 2020-02-18 10:39 a.m., Maxim Kuvyrkov wrote: >> On Feb 18, 2020, at 6:30 PM, Vladimir Makarov <vmakarov@redhat.com> wrote: >> >> On 2/17/20 10:08 AM, Maxim Kuvyrkov wrote: >>> Hi Vladimir, >>> >>> This patch increases code size at -Os on arm-linux-gnueabihf by 1% (with no code-size reductions) on several SPEC CPU2006 benchmarks: >>> >>> 400.perlbench,perlbench_base.default ,580842,583842 >>> 429.mcf,mcf_base.default ,7867,7955 >>> 403.gcc,gcc_base.default ,1726449,1736149 >>> 433.milc,milc_base.default ,66328,66816 >>> 456.hmmer,hmmer_base.default ,148394,149434 >>> 482.sphinx3,sphinx_livepretend_base.default ,99183,99863 >>> >>> Could you look into whether these regressions can be avoided? >>> >> Sure, Maxim. I'll look into it. If I can not solve the problem, I probably revert the patch. > Thanks, Vladimir. Forgot to mention that this is for Thumb2 (--target=arm-linux-gnueabihf --with-mode=thumb). > I've committed a patch which I think should solve the code size increase problem. Could you check it, Maxim. Thanks.
commit 897a73086b2d63a5a6ae79f4276422272eca534d (HEAD -> master, origin/master, origin/HEAD)
Author: Vladimir N. Makarov <vmakarov@redhat.com>
Date: Sun Feb 2 11:23:25 2020 -0500
One more fix for PR 91333 - suboptimal register allocation for inline asm
2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/91333
* ira-color.c (struct allocno_color_data): Add member
hard_reg_prefs.
(init_allocno_threads): Set the member up.
(bucket_allocno_compare_func): Add compare hard reg
prefs.
2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/91333
* gcc.target/i386/pr91333.c: Add vmovsd to regexp. Set up count
to 3.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b2031eea3fb..3c0f1176ead 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR rtl-optimization/91333
+ * ira-color.c (struct allocno_color_data): Add member
+ hard_reg_prefs.
+ (init_allocno_threads): Set the member up.
+ (bucket_allocno_compare_func): Add compare hard reg
+ prefs.
+
2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
diff --git a/gcc/ira-color.c b/gcc/ira-color.c
index 51c4afd6391..444cb1e8279 100644
--- a/gcc/ira-color.c
+++ b/gcc/ira-color.c
@@ -151,6 +151,8 @@ struct allocno_color_data
ira_allocno_t next_thread_allocno;
/* All thread frequency. Defined only for first thread allocno. */
int thread_freq;
+ /* Sum of frequencies of hard register preferences of the allocno. */
+ int hard_reg_prefs;
};
/* See above. */
@@ -2173,6 +2175,7 @@ init_allocno_threads (void)
ira_allocno_t a;
unsigned int j;
bitmap_iterator bi;
+ ira_pref_t pref;
EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi)
{
@@ -2181,6 +2184,9 @@ init_allocno_threads (void)
ALLOCNO_COLOR_DATA (a)->first_thread_allocno
= ALLOCNO_COLOR_DATA (a)->next_thread_allocno = a;
ALLOCNO_COLOR_DATA (a)->thread_freq = ALLOCNO_FREQ (a);
+ ALLOCNO_COLOR_DATA (a)->hard_reg_prefs = 0;
+ for (pref = ALLOCNO_PREFS (a); pref != NULL; pref = pref->next_pref)
+ ALLOCNO_COLOR_DATA (a)->hard_reg_prefs += pref->freq;
}
}
@@ -2251,6 +2257,11 @@ bucket_allocno_compare_func (const void *v1p, const void *v2p)
ira_allocno_t t2 = ALLOCNO_COLOR_DATA (a2)->first_thread_allocno;
int cl1 = ALLOCNO_CLASS (a1), cl2 = ALLOCNO_CLASS (a2);
+ /* Push allocnos with minimal hard_reg_prefs first. */
+ pref1 = ALLOCNO_COLOR_DATA (a1)->hard_reg_prefs;
+ pref2 = ALLOCNO_COLOR_DATA (a2)->hard_reg_prefs;
+ if ((diff = pref1 - pref2) != 0)
+ return diff;
/* Push allocnos with minimal conflict_allocno_hard_prefs first. */
pref1 = ALLOCNO_COLOR_DATA (a1)->conflict_allocno_hard_prefs;
pref2 = ALLOCNO_COLOR_DATA (a2)->conflict_allocno_hard_prefs;
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 5902ab6bb85..779f1fbb457 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR rtl-optimization/91333
+ * gcc.target/i386/pr91333.c: Add vmovsd to regexp. Set up count
+ to 3.
+
2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
diff --git a/gcc/testsuite/gcc.target/i386/pr91333.c b/gcc/testsuite/gcc.target/i386/pr91333.c
index 41fc328698e..269491202ae 100644
--- a/gcc/testsuite/gcc.target/i386/pr91333.c
+++ b/gcc/testsuite/gcc.target/i386/pr91333.c
@@ -1,6 +1,6 @@
/* { dg-do compile { target x86_64-*-* } } */
/* { dg-options "-O2 -mavx" } */
-/* { dg-final { scan-assembler-times "vmovapd" 2 } } */
+/* { dg-final { scan-assembler-times "vmovapd|vmovsd" 3 } } */
static inline double g (double x){
asm volatile ("" : "+x" (x));