===================================================================
@@ -35,8 +35,7 @@ (define_expand "mem_thread_fence"
(define_expand "membar"
[(set (match_dup 1)
- (unspec:BLK [(match_dup 1)
- (match_operand:SI 0 "const_int_operand")]
+ (unspec:BLK [(match_dup 1) (match_operand:SI 0 "const_int_operand")]
UNSPEC_MEMBAR))]
"TARGET_V8 || TARGET_V9"
{
@@ -66,7 +65,7 @@ (define_insn "*membar_storestore"
"stbar"
[(set_attr "type" "multi")])
-;; For V8, LDSTUB has the effect of membar #StoreLoad
+;; For V8, LDSTUB has the effect of membar #StoreLoad.
(define_insn "*membar_storeload"
[(set (match_operand:BLK 0 "" "")
(unspec:BLK [(match_dup 0) (const_int 2)] UNSPEC_MEMBAR))]
@@ -123,8 +122,8 @@ (define_insn "atomic_loaddi_1"
[(set_attr "type" "load,fpload")])
(define_expand "atomic_store<mode>"
- [(match_operand:I 0 "register_operand" "")
- (match_operand:I 1 "memory_operand" "")
+ [(match_operand:I 0 "memory_operand" "")
+ (match_operand:I 1 "register_operand" "")
(match_operand:SI 2 "const_int_operand" "")]
""
{
===================================================================
@@ -11190,26 +11190,26 @@ sparc_emit_membar_for_model (enum memmod
if (before_after & 1)
{
- if (model == MEMMODEL_ACQUIRE
- || model == MEMMODEL_ACQ_REL
- || model == MEMMODEL_SEQ_CST)
+ if (model == MEMMODEL_RELEASE
+ || model == MEMMODEL_ACQ_REL
+ || model == MEMMODEL_SEQ_CST)
{
if (load_store & 1)
- mm |= LoadLoad | LoadStore;
+ mm |= LoadLoad | StoreLoad;
if (load_store & 2)
- mm |= StoreLoad | StoreStore;
+ mm |= LoadStore | StoreStore;
}
}
if (before_after & 2)
{
- if (model == MEMMODEL_RELEASE
+ if (model == MEMMODEL_ACQUIRE
|| model == MEMMODEL_ACQ_REL
|| model == MEMMODEL_SEQ_CST)
{
if (load_store & 1)
- mm |= LoadLoad | StoreLoad;
+ mm |= LoadLoad | LoadStore;
if (load_store & 2)
- mm |= LoadStore | StoreStore;
+ mm |= StoreLoad | StoreStore;
}
}
As reported by Tomash, the handling of the before and after cases is reversed in sparc_emit_membar_for_model. Moreover, there is a pasto in sync.md that disables the atomic_store expander. Tested on SPARC/Linux, applied on the mainline and 4.7 branch. 2012-12-16 Eric Botcazou <ebotcazou@adacore.com> Tomash Brechko <tomash.brechko@gmail.com> PR target/55673 * config/sparc/sparc.c (sparc_emit_membar_for_model): Fix reversed handling of before and after cases. * config/sparc/sync.md (atomic_store): Fix pasto.