| Message ID | 20240516213119.2433328-1-ewlu@rivosinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | RISC-V: Fix testcases renamed test flag options | expand |
diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt index d1172897ff9..f7396d57704 100644 --- a/gcc/config/riscv/riscv.opt +++ b/gcc/config/riscv/riscv.opt @@ -615,7 +615,7 @@ overrides whatever default is encoded in the cpu-tune parameters. mvsetvli00 Target Integer Var(riscv_mvsetvli00) Init(1) -Enable (default) or disable generation of \"vsetvli zero,zero,...\" +Enable (default) or disable generation of \"vsetvli zero,zero,...\". Enum Name(tls_type) Type(enum riscv_tls_type) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/no-segment.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/no-segment.c index b0feccf853f..79d03612a22 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/no-segment.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/no-segment.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=scalable -O3 -mno-autovec-segment" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=scalable -O3 -mno-autovec-segment" } */ enum e { c, d }; enum g { f }; diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-1.c index 072359548eb..dc577af816b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-1.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "mask_struct_load_run-1.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-2.c index 7118ea38927..0bb4e599816 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-2.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "mask_struct_load_run-2.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-3.c index 38608f56475..3d70c0dbca6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-3.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "mask_struct_load_run-3.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-4.c index 5e565fd2e44..ca98fd52cbc 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-4.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "mask_struct_load_run-4.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-5.c index 8bcaa2e340a..190b95a6669 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-5.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "mask_struct_load_run-5.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-6.c index 8328962fcbe..769d709ce50 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-6.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "mask_struct_load_run-6.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-7.c index db2a5cf908c..bcd31f3229c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load_noseg_run-7.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "mask_struct_load_run-7.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-1.c index fcd9b0302a0..ec7b3811982 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-1.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "mask_struct_store_run-1.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-2.c index 5541a3a7105..ca3b3d77136 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-2.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "mask_struct_store_run-2.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-3.c index 415d7cfd025..e4fdea08dd2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-3.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "mask_struct_store_run-3.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-4.c index e5471c2242f..7f63d204349 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-4.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "mask_struct_store_run-4.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-5.c index 178057f7724..df0448dcab9 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-5.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "mask_struct_store_run-5.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-6.c index 91e24d64aa3..e6268b36098 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-6.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "mask_struct_store_run-6.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-7.c index 5ce8bb7bae2..0fdcb8ba85e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_store_noseg_run-7.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "mask_struct_store_run-7.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-1.c index 0e24c5772b8..2a50b7133be 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-1.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 --param=riscv-autovec-preference=fixed-vlmax -funroll-all-loops -fno-schedule-insns -fno-schedule-insns2 -mno-autovec-segment" } */ +/* { dg-additional-options "-std=c99 -mrvv-vector-bits=zvl -funroll-all-loops -fno-schedule-insns -fno-schedule-insns2 -mno-autovec-segment" } */ #include "struct_vect_run-1.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-10.c index e095b769906..887a7f9a6e8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-10.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-10.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */ -/* { dg-additional-options "-std=c99 --param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-do run { target { riscv_v && riscv_zvfh } } } */ +/* { dg-additional-options "-std=c99 -mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "struct_vect_run-10.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-11.c index 549dd15ad22..f99db9b8f6c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-11.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-11.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 --param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-std=c99 -mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "struct_vect_run-11.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-12.c index 8fa80cf6530..3c320991a0f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-12.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-12.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 --param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-std=c99 -mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "struct_vect_run-12.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-13.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-13.c index 9b0e3b7881d..588c728968a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-13.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-13.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "struct_vect_run-13.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-14.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-14.c index 34b871e7073..7d4d1bfc899 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-14.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-14.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "struct_vect_run-14.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-15.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-15.c index 4166903f11a..c462a1cb925 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-15.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-15.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "struct_vect_run-15.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-16.c index f86a3a7c6de..35d0febb029 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-16.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "struct_vect_run-16.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-17.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-17.c index 113c8c8fd72..4cedba48683 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-17.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-17.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "struct_vect_run-17.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-18.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-18.c index a1436fab644..2bf1cd6984d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-18.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-18.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "struct_vect_run-18.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-2.c index 2108b5e9592..36772aaf900 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-2.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 --param=riscv-autovec-preference=fixed-vlmax -funroll-all-loops -fno-schedule-insns -fno-schedule-insns2 -mno-autovec-segment" } */ +/* { dg-additional-options "-std=c99 -mrvv-vector-bits=zvl -funroll-all-loops -fno-schedule-insns -fno-schedule-insns2 -mno-autovec-segment" } */ #include "struct_vect_run-2.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-3.c index 5640a7e66a9..58201220915 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-3.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 --param=riscv-autovec-preference=fixed-vlmax -funroll-all-loops -fno-schedule-insns -fno-schedule-insns2 -mno-autovec-segment" } */ +/* { dg-additional-options "-std=c99 -mrvv-vector-bits=zvl -funroll-all-loops -fno-schedule-insns -fno-schedule-insns2 -mno-autovec-segment" } */ #include "struct_vect_run-3.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-4.c index 2bfda096552..4ac2c39c4ca 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-4.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 --param=riscv-autovec-preference=fixed-vlmax -funroll-all-loops -fno-schedule-insns -fno-schedule-insns2 -mno-autovec-segment" } */ +/* { dg-additional-options "-std=c99 -mrvv-vector-bits=zvl -funroll-all-loops -fno-schedule-insns -fno-schedule-insns2 -mno-autovec-segment" } */ #include "struct_vect_run-4.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-5.c index 6c03a7caf3d..dd90a1771a8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-5.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 --param=riscv-autovec-preference=fixed-vlmax -funroll-all-loops -fno-schedule-insns -fno-schedule-insns2 -mno-autovec-segment" } */ +/* { dg-additional-options "-std=c99 -mrvv-vector-bits=zvl -funroll-all-loops -fno-schedule-insns -fno-schedule-insns2 -mno-autovec-segment" } */ #include "struct_vect_run-5.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-6.c index 4d216ae197c..0efbee0db9c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-6.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 --param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-std=c99 -mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "struct_vect_run-6.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-7.c index d1a00f1aed6..c08d13063f5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-7.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 --param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-std=c99 -mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "struct_vect_run-7.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-8.c index a0a35a90e3e..404f5d664f8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-8.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 --param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-std=c99 -mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "struct_vect_run-8.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-9.c index 286a7efe2fb..e14ceb9cbf8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/struct_vect_noseg_run-9.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 --param=riscv-autovec-preference=scalable -fno-vect-cost-model -mno-autovec-segment" } */ +/* { dg-additional-options "-std=c99 -mrvv-vector-bits=scalable -fno-vect-cost-model -mno-autovec-segment" } */ #include "struct_vect_run-9.c"