diff mbox series

[1/2] Add check for 8-bit old registers in EVEX format

Message ID 20240515062414.3960582-2-lili.cui@intel.com
State New
Headers show
Series Support APX zero-upper | expand

Commit Message

Cui, Lili May 15, 2024, 6:24 a.m. UTC 
gas/ChangeLog:

        * config/tc-i386.c (md_assemble): Add invalid check for old byte
        registers in EVEX/VEX format.
        * testsuite/gas/i386/x86-64-apx-inval.l: Add new test.
        * testsuite/gas/i386/x86-64-apx-inval.s: Ditto.
---
 gas/config/tc-i386.c                      | 12 ++++++++++++
 gas/testsuite/gas/i386/x86-64-apx-inval.l |  3 +++
 gas/testsuite/gas/i386/x86-64-apx-inval.s |  2 ++
 3 files changed, 17 insertions(+)
diff mbox series

Patch

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 339e849a971..18d06371321 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -7029,6 +7029,18 @@  md_assemble (char *line)
 	  as_bad (_("{rex2} prefix invalid with `%s'"), insn_name (&i.tm));
 	  return;
 	}
+      /* Check for 8 bit operand that uses old registers.  */
+      for (unsigned int op = 0; op < i.operands; op++)
+	{
+	  if (i.types[op].bitfield.class == Reg
+	      && i.types[op].bitfield.byte
+	      && !(i.op[op].regs->reg_flags & RegRex64)
+	      && i.op[op].regs->reg_num > 3)
+
+	    as_bad (_("can't encode register '%s' in an "
+		      " EVEX/VEX prefix instruction"),
+		    i.op[op].regs->reg_name);
+	}
 
       if (is_apx_evex_encoding ())
 	build_apx_evex_prefix ();
diff --git a/gas/testsuite/gas/i386/x86-64-apx-inval.l b/gas/testsuite/gas/i386/x86-64-apx-inval.l
index 7a870b27b72..3595213b179 100644
--- a/gas/testsuite/gas/i386/x86-64-apx-inval.l
+++ b/gas/testsuite/gas/i386/x86-64-apx-inval.l
@@ -12,3 +12,6 @@ 
 .*:13: Error: \{nf\} unsupported for `mulx'
 .*:14: Error: \{nf\} cannot be combined with \{vex\}/\{vex3\}
 .*:15: Error: \{nf\} cannot be combined with \{vex\}/\{vex3\}
+.*:16: Error: can't encode register 'ah' in an  EVEX/VEX prefix instruction
+.*:17: Error: can't encode register 'ah' in an  EVEX/VEX prefix instruction
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-apx-inval.s b/gas/testsuite/gas/i386/x86-64-apx-inval.s
index 0487b885ec8..3a8402429ed 100644
--- a/gas/testsuite/gas/i386/x86-64-apx-inval.s
+++ b/gas/testsuite/gas/i386/x86-64-apx-inval.s
@@ -13,3 +13,5 @@ 
 	{nf} mulx %r15,%r15,%r11
 	{nf} {vex} bextr %ecx, %edx, %r10d
 	{vex} {nf} bextr %ecx, %edx, %r10d
+        {nf} add %dl,%ah
+        {evex} adc %dl,%ah