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X-IronPort-AV: E=McAfee;i="6600,9927,11012"; a="5027193" X-IronPort-AV: E=Sophos;i="6.07,124,1708416000"; d="scan'208";a="5027193" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2024 18:33:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,124,1708416000"; d="scan'208";a="12047007" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmviesa010.fm.intel.com with ESMTP; 13 Mar 2024 18:33:03 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id D82C51006FE8; Thu, 14 Mar 2024 09:33:02 +0800 (CST) From: liuhongt To: gcc-patches@gcc.gnu.org Cc: ubizjak@gmail.com, hjl.tools@gmail.com Subject: [PATCH] i386[stv]: Handle REG_EH_REGION note Date: Thu, 14 Mar 2024 09:33:02 +0800 Message-Id: <20240314013302.994418-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org When we split (insn 37 36 38 10 (set (reg:DI 104 [ _18 ]) (mem:DI (reg/f:SI 98 [ CallNative_nclosure.0_1 ]) [6 MEM[(struct SQRefCounted *)CallNative_nclosure.0_1]._uiRef+0 S8 A32])) "test.C":22:42 84 {*movdi_internal} (expr_list:REG_EH_REGION (const_int -11 [0xfffffffffffffff5]) into (insn 104 36 37 10 (set (subreg:V2DI (reg:DI 124) 0) (vec_concat:V2DI (mem:DI (reg/f:SI 98 [ CallNative_nclosure.0_1 ]) [6 MEM[(struct SQRefCounted *)CallNative_nclosure.0_1]._uiRef+0 S8 A32]) (const_int 0 [0]))) "test.C":22:42 -1 (nil))) (insn 37 104 105 10 (set (subreg:V2DI (reg:DI 104 [ _18 ]) 0) (subreg:V2DI (reg:DI 124) 0)) "test.C":22:42 2024 {movv2di_internal} (expr_list:REG_EH_REGION (const_int -11 [0xfffffffffffffff5]) (nil))) we must copy the REG_EH_REGION note to the first insn and split the block after the newly added insn. The REG_EH_REGION on the second insn will be removed later since it no longer traps. Currently we only handle memory_operand, are there any other insns need to be handled??? Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,} for trunk and gcc-13/gcc-12 release branch. Ok for trunk and backport? gcc/ChangeLog: * config/i386/i386-features.cc (general_scalar_chain::convert_op): Handle REG_EH_REGION note. (convert_scalars_to_vector): Ditto. * config/i386/i386-features.h (class scalar_chain): New memeber control_flow_insns. gcc/testsuite/ChangeLog: * g++.target/i386/pr111822.C: New test. --- gcc/config/i386/i386-features.cc | 48 ++++++++++++++++++++++-- gcc/config/i386/i386-features.h | 1 + gcc/testsuite/g++.target/i386/pr111822.C | 45 ++++++++++++++++++++++ 3 files changed, 90 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/g++.target/i386/pr111822.C diff --git a/gcc/config/i386/i386-features.cc b/gcc/config/i386/i386-features.cc index 1de2a07ed75..2ed27a9ebdd 100644 --- a/gcc/config/i386/i386-features.cc +++ b/gcc/config/i386/i386-features.cc @@ -998,20 +998,36 @@ general_scalar_chain::convert_op (rtx *op, rtx_insn *insn) } else if (MEM_P (*op)) { + rtx_insn* eh_insn, *movabs = NULL; rtx tmp = gen_reg_rtx (GET_MODE (*op)); /* Handle movabs. */ if (!memory_operand (*op, GET_MODE (*op))) { rtx tmp2 = gen_reg_rtx (GET_MODE (*op)); + movabs = emit_insn_before (gen_rtx_SET (tmp2, *op), insn); - emit_insn_before (gen_rtx_SET (tmp2, *op), insn); *op = tmp2; } - emit_insn_before (gen_rtx_SET (gen_rtx_SUBREG (vmode, tmp, 0), - gen_gpr_to_xmm_move_src (vmode, *op)), - insn); + eh_insn + = emit_insn_before (gen_rtx_SET (gen_rtx_SUBREG (vmode, tmp, 0), + gen_gpr_to_xmm_move_src (vmode, *op)), + insn); + + if (cfun->can_throw_non_call_exceptions) + { + /* Handle REG_EH_REGION note. */ + rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX); + if (note) + { + if (movabs) + eh_insn = movabs; + control_flow_insns.safe_push (eh_insn); + add_reg_note (eh_insn, REG_EH_REGION, XEXP (note, 0)); + } + } + *op = gen_rtx_SUBREG (vmode, tmp, 0); if (dump_file) @@ -2494,6 +2510,7 @@ convert_scalars_to_vector (bool timode_p) { basic_block bb; int converted_insns = 0; + auto_vec control_flow_insns; bitmap_obstack_initialize (NULL); const machine_mode cand_mode[3] = { SImode, DImode, TImode }; @@ -2575,6 +2592,11 @@ convert_scalars_to_vector (bool timode_p) chain->chain_id); } + rtx_insn* iter_insn; + unsigned int ii; + FOR_EACH_VEC_ELT (chain->control_flow_insns, ii, iter_insn) + control_flow_insns.safe_push (iter_insn); + delete chain; } } @@ -2643,6 +2665,24 @@ convert_scalars_to_vector (bool timode_p) DECL_INCOMING_RTL (parm) = gen_rtx_SUBREG (TImode, r, 0); } } + + if (!control_flow_insns.is_empty ()) + { + free_dominance_info (CDI_DOMINATORS); + + unsigned int i; + rtx_insn* insn; + FOR_EACH_VEC_ELT (control_flow_insns, i, insn) + if (control_flow_insn_p (insn)) + { + /* Split the block after insn. There will be a fallthru + edge, which is OK so we keep it. We have to create + the exception edges ourselves. */ + bb = BLOCK_FOR_INSN (insn); + split_block (bb, insn); + rtl_make_eh_edge (NULL, bb, BB_END (bb)); + } + } } return 0; diff --git a/gcc/config/i386/i386-features.h b/gcc/config/i386/i386-features.h index 8bab2d8666d..b259cf679af 100644 --- a/gcc/config/i386/i386-features.h +++ b/gcc/config/i386/i386-features.h @@ -155,6 +155,7 @@ class scalar_chain hash_map defs_map; unsigned n_sse_to_integer; unsigned n_integer_to_sse; + auto_vec control_flow_insns; bool build (bitmap candidates, unsigned insn_uid, bitmap disallowed); virtual int compute_convert_gain () = 0; diff --git a/gcc/testsuite/g++.target/i386/pr111822.C b/gcc/testsuite/g++.target/i386/pr111822.C new file mode 100644 index 00000000000..d405387b23c --- /dev/null +++ b/gcc/testsuite/g++.target/i386/pr111822.C @@ -0,0 +1,45 @@ +/* PR target/111822 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -flive-range-shrinkage -fno-dce -fnon-call-exceptions" } */ + +typedef union { + int *pNativeClosure; + struct SQRefCounted *pRefCounted; +} SQObjectValue; +typedef struct { + SQObjectValue _unVal; +} SQObject; +typedef long SQFUNCTION(struct SQVM *); +struct SQVM { + void CallNative(); +}; +struct SQRefCounted { + long long _uiRef; +}; +void Null(); +struct SQObjectPtr : SQObject { + SQObjectPtr() {} + SQObjectPtr(int *pNativeClosure) { + _unVal.pNativeClosure = pNativeClosure; + _unVal.pRefCounted->_uiRef++; + } + ~SQObjectPtr() { --_unVal.pRefCounted->_uiRef; } +}; +struct CallInfo { + SQObjectPtr _closure; +}; +long long _top; +SQFUNCTION _function; +int *CallNative_nclosure; +void SQVM::CallNative() { + long long oldtop = _top; + CallInfo lci; + lci._closure = CallNative_nclosure; + try { + _function(this); + } catch (...) { + _top = oldtop; + } + while (oldtop) + Null(); +}