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Thu, 14 Dec 2023 21:38:14 +0000 (GMT) Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3BELcDFN015764 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 14 Dec 2023 21:38:14 GMT Received: from hu-apinski-lv.qualcomm.com (10.49.16.6) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 14 Dec 2023 13:38:13 -0800 From: Andrew Pinski To: Subject: [COMMITTED] middle-end: Fix up constant handling in emit_conditional_move [PR111260] Date: Thu, 14 Dec 2023 13:38:00 -0800 Message-ID: <20231214213800.796944-1-quic_apinski@quicinc.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 7SQwOCwhh2FXi__eZJx4q02j_yYpw_LB X-Proofpoint-ORIG-GUID: 7SQwOCwhh2FXi__eZJx4q02j_yYpw_LB X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-09_02,2023-12-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxlogscore=956 mlxscore=0 priorityscore=1501 malwarescore=0 suspectscore=0 bulkscore=0 spamscore=0 phishscore=0 adultscore=11 impostorscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2312140152 X-Spam-Status: No, score=-13.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org After r14-2667-gceae1400cf24f329393e96dd9720, we force a constant to a register if it is shared with one of the other operands. The problem is used the comparison mode for the register but that could be different from the operand mode. This causes some issues on some targets. To fix it, we need to make sure the mode of the comparison matches the mode of the other operands, before we can compare the constants (CONST_INT has no modes so compare_rtx returns true if they have the same value even if the usage is in a different mode). Bootstrapped and tested on both aarch64-linux-gnu and x86_64-linux. PR middle-end/111260 gcc/ChangeLog: * optabs.cc (emit_conditional_move): Change the modes to be equal before forcing the constant to a register. gcc/testsuite/ChangeLog: * gcc.c-torture/compile/condmove-1.c: New test. Signed-off-by: Andrew Pinski --- gcc/optabs.cc | 2 ++ gcc/testsuite/gcc.c-torture/compile/condmove-1.c | 9 +++++++++ 2 files changed, 11 insertions(+) create mode 100644 gcc/testsuite/gcc.c-torture/compile/condmove-1.c diff --git a/gcc/optabs.cc b/gcc/optabs.cc index f0a048a6bdb..6a34276c239 100644 --- a/gcc/optabs.cc +++ b/gcc/optabs.cc @@ -5131,6 +5131,7 @@ emit_conditional_move (rtx target, struct rtx_comparison comp, /* If we are optimizing, force expensive constants into a register but preserve an eventual equality with op2/op3. */ if (CONSTANT_P (orig_op0) && optimize + && cmpmode == mode && (rtx_cost (orig_op0, mode, COMPARE, 0, optimize_insn_for_speed_p ()) > COSTS_N_INSNS (1)) @@ -5142,6 +5143,7 @@ emit_conditional_move (rtx target, struct rtx_comparison comp, op3p = XEXP (comparison, 0) = force_reg (cmpmode, orig_op0); } if (CONSTANT_P (orig_op1) && optimize + && cmpmode == mode && (rtx_cost (orig_op1, mode, COMPARE, 0, optimize_insn_for_speed_p ()) > COSTS_N_INSNS (1)) diff --git a/gcc/testsuite/gcc.c-torture/compile/condmove-1.c b/gcc/testsuite/gcc.c-torture/compile/condmove-1.c new file mode 100644 index 00000000000..3fcc591af00 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/condmove-1.c @@ -0,0 +1,9 @@ +/* PR middle-end/111260 */ + +/* Used to ICE while expansion of the `(a == b) ? b : 0;` */ +int f1(long long a) +{ + int b = 822920; + int t = a == b; + return t * (int)b; +}