diff mbox series

[3/3,aarch64] Adjust testcase to match assembly output after r14-2007.

Message ID 20230626013105.18788-3-hongtao.liu@intel.com
State New
Headers show
Series [1/3] Use cvt_op to save intermediate type operand instead of "subtle" vec_dest. | expand

Commit Message

liuhongt June 26, 2023, 1:31 a.m. UTC
The new assembly looks better than original one, so I adjust those testcases.
Ok for trunk?

gcc/testsuite/ChangeLog:

	PR tree-optimization/110371
	PR tree-optimization/110018
	* gcc.target/aarch64/sve/unpack_fcvt_signed_1.c: Scan scvt +
	sxtw instead of scvt + zip1 + zip2.
	* gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c: Scan scvt +
	uxtw instead of ucvtf + zip1 + zip2.
---
 gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c | 6 +++---
 .../gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c         | 5 ++---
 2 files changed, 5 insertions(+), 6 deletions(-)

Comments

Hongtao Liu June 26, 2023, 1:32 a.m. UTC | #1
On Mon, Jun 26, 2023 at 9:31 AM liuhongt via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> The new assembly looks better than original one, so I adjust those testcases.
> Ok for trunk?
>
> gcc/testsuite/ChangeLog:
>
>         PR tree-optimization/110371
>         PR tree-optimization/110018
>         * gcc.target/aarch64/sve/unpack_fcvt_signed_1.c: Scan scvt +
>         sxtw instead of scvt + zip1 + zip2.
>         * gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c: Scan scvt +
>         uxtw instead of ucvtf + zip1 + zip2.
> ---
>  gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c | 6 +++---
>  .../gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c         | 5 ++---
>  2 files changed, 5 insertions(+), 6 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c
> index 0f96dc2ff00..5edc288ce35 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c
> @@ -10,6 +10,6 @@ unpack_double_int_plus8 (double *d, int32_t *s, int size)
>      d[i] = s[i] + 8;
>  }
>
> -/* { dg-final { scan-assembler-times {\tzip1\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tzip2\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tscvtf\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.s\n} 2 } } */
> +/* { dg-final { scan-assembler-times {\tscvtf\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tsxtw\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d\n} 1 } } */
> +
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c
> index 70465f91eba..ecd72176177 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c
> @@ -10,6 +10,5 @@ unpack_double_int_plus9 (double *d, uint32_t *s, int size)
>      d[i] = (double) (s[i] + 9);
>  }
>
> -/* { dg-final { scan-assembler-times {\tzip1\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tzip2\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tucvtf\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.s\n} 2 } } */
> +/* { dg-final { scan-assembler-times {\tscvtf\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d\n} 1 } } */
> --
> 2.39.1.388.g2fc9e9ca3c
>


--
BR,
Hongtao
Richard Sandiford June 26, 2023, 8:21 a.m. UTC | #2
liuhongt <hongtao.liu@intel.com> writes:
> The new assembly looks better than original one, so I adjust those testcases.

The new loops are shorter, but they process only half the amount of data
per iteration.

The problem is that the new vectoriser code generates multiple statements
but only costs one.  I'll post a fix soon.

Thanks,
Richard

> Ok for trunk?
>
> gcc/testsuite/ChangeLog:
>
> 	PR tree-optimization/110371
> 	PR tree-optimization/110018
> 	* gcc.target/aarch64/sve/unpack_fcvt_signed_1.c: Scan scvt +
> 	sxtw instead of scvt + zip1 + zip2.
> 	* gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c: Scan scvt +
> 	uxtw instead of ucvtf + zip1 + zip2.
> ---
>  gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c | 6 +++---
>  .../gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c         | 5 ++---
>  2 files changed, 5 insertions(+), 6 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c
> index 0f96dc2ff00..5edc288ce35 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c
> @@ -10,6 +10,6 @@ unpack_double_int_plus8 (double *d, int32_t *s, int size)
>      d[i] = s[i] + 8;
>  }
>  
> -/* { dg-final { scan-assembler-times {\tzip1\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tzip2\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tscvtf\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.s\n} 2 } } */
> +/* { dg-final { scan-assembler-times {\tscvtf\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tsxtw\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d\n} 1 } } */
> +
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c
> index 70465f91eba..ecd72176177 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c
> @@ -10,6 +10,5 @@ unpack_double_int_plus9 (double *d, uint32_t *s, int size)
>      d[i] = (double) (s[i] + 9);
>  }
>  
> -/* { dg-final { scan-assembler-times {\tzip1\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tzip2\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tucvtf\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.s\n} 2 } } */
> +/* { dg-final { scan-assembler-times {\tscvtf\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d\n} 1 } } */
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c
index 0f96dc2ff00..5edc288ce35 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c
@@ -10,6 +10,6 @@  unpack_double_int_plus8 (double *d, int32_t *s, int size)
     d[i] = s[i] + 8;
 }
 
-/* { dg-final { scan-assembler-times {\tzip1\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */
-/* { dg-final { scan-assembler-times {\tzip2\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */
-/* { dg-final { scan-assembler-times {\tscvtf\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.s\n} 2 } } */
+/* { dg-final { scan-assembler-times {\tscvtf\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d\n} 1 } } */
+/* { dg-final { scan-assembler-times {\tsxtw\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d\n} 1 } } */
+
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c
index 70465f91eba..ecd72176177 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c
@@ -10,6 +10,5 @@  unpack_double_int_plus9 (double *d, uint32_t *s, int size)
     d[i] = (double) (s[i] + 9);
 }
 
-/* { dg-final { scan-assembler-times {\tzip1\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */
-/* { dg-final { scan-assembler-times {\tzip2\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */
-/* { dg-final { scan-assembler-times {\tucvtf\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.s\n} 2 } } */
+/* { dg-final { scan-assembler-times {\tscvtf\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d\n} 1 } } */
+/* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d\n} 1 } } */