diff mbox series

[v3] RISCV: Add vector psabi checking.

Message ID 20230427031242.662721-1-yanzhang.wang@intel.com
State New
Headers show
Series [v3] RISCV: Add vector psabi checking. | expand

Commit Message

Li, Pan2 via Gcc-patches April 27, 2023, 3:12 a.m. UTC
From: Yanzhang Wang <yanzhang.wang@intel.com>

This patch adds support to check function's argument or return is vector type
and throw warning if yes.

gcc/ChangeLog:

	* config/riscv/riscv.cc:
	(riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
	(riscv_arg_has_vector): Determine whether the arg is vector type.
	(riscv_pass_in_vector_p): Check the vector type param is passed by value.
	(riscv_get_arg_info): Add the checking.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/vector-abi-1.c: New test.
	* gcc.target/riscv/vector-abi-2.c: New test.
	* gcc.target/riscv/vector-abi-3.c: New test.
	* gcc.target/riscv/vector-abi-4.c: New test.
	* gcc.target/riscv/vector-abi-5.c: New test.

Signed-off-by: Yanzhang Wang <yanzhang.wang@intel.com>
Co-authored-by: Kito Cheng <kito.cheng@sifive.com>
---
 gcc/config/riscv/riscv.cc                     | 73 +++++++++++++++++++
 gcc/testsuite/gcc.target/riscv/vector-abi-1.c | 14 ++++
 gcc/testsuite/gcc.target/riscv/vector-abi-2.c | 14 ++++
 gcc/testsuite/gcc.target/riscv/vector-abi-3.c | 14 ++++
 gcc/testsuite/gcc.target/riscv/vector-abi-4.c | 16 ++++
 gcc/testsuite/gcc.target/riscv/vector-abi-5.c | 15 ++++
 6 files changed, 146 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/vector-abi-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/vector-abi-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/vector-abi-3.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/vector-abi-4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/vector-abi-5.c

Comments

Kito Cheng April 27, 2023, 3:41 p.m. UTC | #1
Ooops, I found that it also warns on intrinsic functions, could you
try to find some way to exclude that?

e.g.
#include "riscv_vector.h"

void foo(int32_t *in1, int32_t *in2, int32_t *in3, int32_t *out,
size_t n, int cond) {

 size_t vl;
 if (cond)
   vl = __riscv_vsetvlmax_e32m1();
 else
   vl = __riscv_vsetvlmax_e16mf2();
 for (size_t i = 0; i < n; i += 1) {
   vint32m1_t a = __riscv_vle32_v_i32m1(in1, vl); // warning: ABI for
the scalable vector type is currently in experimental stage and may
changes in the upcoming version of GCC. [-Wpsabi]
   vint32m1_t b = __riscv_vle32_v_i32m1_tu(a, in2, vl);
   vint32m1_t c = __riscv_vle32_v_i32m1_tu(b, in3, vl);
   __riscv_vse32_v_i32m1(out, c, vl);

}
}

On Thu, Apr 27, 2023 at 11:13 AM yanzhang.wang--- via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> From: Yanzhang Wang <yanzhang.wang@intel.com>
>
> This patch adds support to check function's argument or return is vector type
> and throw warning if yes.
>
> gcc/ChangeLog:
>
>         * config/riscv/riscv.cc:
>         (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
>         (riscv_arg_has_vector): Determine whether the arg is vector type.
>         (riscv_pass_in_vector_p): Check the vector type param is passed by value.
>         (riscv_get_arg_info): Add the checking.
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/riscv/vector-abi-1.c: New test.
>         * gcc.target/riscv/vector-abi-2.c: New test.
>         * gcc.target/riscv/vector-abi-3.c: New test.
>         * gcc.target/riscv/vector-abi-4.c: New test.
>         * gcc.target/riscv/vector-abi-5.c: New test.
>
> Signed-off-by: Yanzhang Wang <yanzhang.wang@intel.com>
> Co-authored-by: Kito Cheng <kito.cheng@sifive.com>
> ---
>  gcc/config/riscv/riscv.cc                     | 73 +++++++++++++++++++
>  gcc/testsuite/gcc.target/riscv/vector-abi-1.c | 14 ++++
>  gcc/testsuite/gcc.target/riscv/vector-abi-2.c | 14 ++++
>  gcc/testsuite/gcc.target/riscv/vector-abi-3.c | 14 ++++
>  gcc/testsuite/gcc.target/riscv/vector-abi-4.c | 16 ++++
>  gcc/testsuite/gcc.target/riscv/vector-abi-5.c | 15 ++++
>  6 files changed, 146 insertions(+)
>  create mode 100644 gcc/testsuite/gcc.target/riscv/vector-abi-1.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/vector-abi-2.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/vector-abi-3.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/vector-abi-4.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/vector-abi-5.c
>
> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
> index 76eee4a55e9..06e9fe7d924 100644
> --- a/gcc/config/riscv/riscv.cc
> +++ b/gcc/config/riscv/riscv.cc
> @@ -3728,6 +3728,76 @@ riscv_pass_fpr_pair (machine_mode mode, unsigned regno1,
>                                    GEN_INT (offset2))));
>  }
>
> +/* Use the TYPE_SIZE to distinguish the type with vector_size attribute and
> +   intrinsic vector type.  Because we can't get the decl for the params.  */
> +
> +static bool
> +riscv_scalable_vector_type_p (const_tree type)
> +{
> +  tree size = TYPE_SIZE (type);
> +  if (size && TREE_CODE (size) == INTEGER_CST)
> +    return false;
> +
> +  /* For the data type like vint32m1_t, the size code is POLY_INT_CST.  */
> +  return true;
> +}
> +
> +static bool
> +riscv_arg_has_vector (const_tree type)
> +{
> +  bool is_vector = false;
> +
> +  switch (TREE_CODE (type))
> +    {
> +    case RECORD_TYPE:
> +      if (!COMPLETE_TYPE_P (type))
> +       break;
> +
> +      for (tree f = TYPE_FIELDS (type); f; f = DECL_CHAIN (f))
> +       if (TREE_CODE (f) == FIELD_DECL)
> +         {
> +           tree field_type = TREE_TYPE (f);
> +           if (!TYPE_P (field_type))
> +             break;
> +
> +           /* Ignore it if it's fixed length vector.  */
> +           if (VECTOR_TYPE_P (field_type))
> +             is_vector = riscv_scalable_vector_type_p (field_type);
> +           else
> +             is_vector = riscv_arg_has_vector (field_type);
> +         }
> +
> +      break;
> +
> +    case VECTOR_TYPE:
> +      is_vector = riscv_scalable_vector_type_p (type);
> +      break;
> +
> +    default:
> +      is_vector = false;
> +      break;
> +    }
> +
> +  return is_vector;
> +}
> +
> +/* Pass the type to check whether it's a vector type or contains vector type.
> +   Only check the value type and no checking for vector pointer type.  */
> +
> +static void
> +riscv_pass_in_vector_p (const_tree type)
> +{
> +  static int warned = 0;
> +
> +  if (type && riscv_arg_has_vector (type) && !warned)
> +    {
> +      warning (OPT_Wpsabi, "ABI for the scalable vector type is currently in "
> +              "experimental stage and may changes in the upcoming version of "
> +              "GCC.");
> +      warned = 1;
> +    }
> +}
> +
>  /* Fill INFO with information about a single argument, and return an
>     RTL pattern to pass or return the argument.  CUM is the cumulative
>     state for earlier arguments.  MODE is the mode of this argument and
> @@ -3812,6 +3882,9 @@ riscv_get_arg_info (struct riscv_arg_info *info, const CUMULATIVE_ARGS *cum,
>         }
>      }
>
> +  /* Only check existing of vector type.  */
> +  riscv_pass_in_vector_p (type);
> +
>    /* Work out the size of the argument.  */
>    num_bytes = type ? int_size_in_bytes (type) : GET_MODE_SIZE (mode).to_constant ();
>    num_words = (num_bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
> diff --git a/gcc/testsuite/gcc.target/riscv/vector-abi-1.c b/gcc/testsuite/gcc.target/riscv/vector-abi-1.c
> new file mode 100644
> index 00000000000..969f14277a4
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/vector-abi-1.c
> @@ -0,0 +1,14 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O0 -march=rv64gcv -mabi=lp64d" } */
> +
> +#include "riscv_vector.h"
> +
> +void
> +fun (vint32m1_t a) { } /* { dg-warning "the scalable vector type" } */
> +
> +void
> +bar ()
> +{
> +  vint32m1_t a;
> +  fun (a);
> +}
> diff --git a/gcc/testsuite/gcc.target/riscv/vector-abi-2.c b/gcc/testsuite/gcc.target/riscv/vector-abi-2.c
> new file mode 100644
> index 00000000000..b752760b76f
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/vector-abi-2.c
> @@ -0,0 +1,14 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
> +
> +#include "riscv_vector.h"
> +
> +vint32m1_t
> +fun (vint32m1_t* a) {  return *a; }  /* { dg-warning "the scalable vector type" } */
> +
> +void
> +bar ()
> +{
> +  vint32m1_t a;
> +  fun (&a);
> +}
> diff --git a/gcc/testsuite/gcc.target/riscv/vector-abi-3.c b/gcc/testsuite/gcc.target/riscv/vector-abi-3.c
> new file mode 100644
> index 00000000000..90ece60cc6f
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/vector-abi-3.c
> @@ -0,0 +1,14 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
> +
> +#include "riscv_vector.h"
> +
> +vint32m1_t*
> +fun (vint32m1_t* a) {  return a; }  /* { dg-bogus "the scalable vector type" } */
> +
> +void
> +bar ()
> +{
> +  vint32m1_t a;
> +  fun (&a);
> +}
> diff --git a/gcc/testsuite/gcc.target/riscv/vector-abi-4.c b/gcc/testsuite/gcc.target/riscv/vector-abi-4.c
> new file mode 100644
> index 00000000000..ecf6d4cc26b
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/vector-abi-4.c
> @@ -0,0 +1,16 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
> +
> +#include "riscv_vector.h"
> +
> +typedef int v4si __attribute__ ((vector_size (16)));
> +
> +v4si
> +fun (v4si a) {  return a; }  /* { dg-bogus "the scalable vector type" } */
> +
> +void
> +bar ()
> +{
> +  v4si a;
> +  fun (a);
> +}
> diff --git a/gcc/testsuite/gcc.target/riscv/vector-abi-5.c b/gcc/testsuite/gcc.target/riscv/vector-abi-5.c
> new file mode 100644
> index 00000000000..6053e0783b6
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/vector-abi-5.c
> @@ -0,0 +1,15 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
> +
> +typedef int v4si __attribute__ ((vector_size (16)));
> +struct A { int a; v4si b; };
> +
> +void
> +fun (struct A a) {} /* { dg-bogus "the scalable vector type" } */
> +
> +void
> +bar ()
> +{
> +  struct A a;
> +  fun (a);
> +}
> --
> 2.40.0
>
diff mbox series

Patch

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 76eee4a55e9..06e9fe7d924 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -3728,6 +3728,76 @@  riscv_pass_fpr_pair (machine_mode mode, unsigned regno1,
 				   GEN_INT (offset2))));
 }
 
+/* Use the TYPE_SIZE to distinguish the type with vector_size attribute and
+   intrinsic vector type.  Because we can't get the decl for the params.  */
+
+static bool
+riscv_scalable_vector_type_p (const_tree type)
+{
+  tree size = TYPE_SIZE (type);
+  if (size && TREE_CODE (size) == INTEGER_CST)
+    return false;
+
+  /* For the data type like vint32m1_t, the size code is POLY_INT_CST.  */
+  return true;
+}
+
+static bool
+riscv_arg_has_vector (const_tree type)
+{
+  bool is_vector = false;
+
+  switch (TREE_CODE (type))
+    {
+    case RECORD_TYPE:
+      if (!COMPLETE_TYPE_P (type))
+	break;
+
+      for (tree f = TYPE_FIELDS (type); f; f = DECL_CHAIN (f))
+	if (TREE_CODE (f) == FIELD_DECL)
+	  {
+	    tree field_type = TREE_TYPE (f);
+	    if (!TYPE_P (field_type))
+	      break;
+
+	    /* Ignore it if it's fixed length vector.  */
+	    if (VECTOR_TYPE_P (field_type))
+	      is_vector = riscv_scalable_vector_type_p (field_type);
+	    else
+	      is_vector = riscv_arg_has_vector (field_type);
+	  }
+
+      break;
+
+    case VECTOR_TYPE:
+      is_vector = riscv_scalable_vector_type_p (type);
+      break;
+
+    default:
+      is_vector = false;
+      break;
+    }
+
+  return is_vector;
+}
+
+/* Pass the type to check whether it's a vector type or contains vector type.
+   Only check the value type and no checking for vector pointer type.  */
+
+static void
+riscv_pass_in_vector_p (const_tree type)
+{
+  static int warned = 0;
+
+  if (type && riscv_arg_has_vector (type) && !warned)
+    {
+      warning (OPT_Wpsabi, "ABI for the scalable vector type is currently in "
+	       "experimental stage and may changes in the upcoming version of "
+	       "GCC.");
+      warned = 1;
+    }
+}
+
 /* Fill INFO with information about a single argument, and return an
    RTL pattern to pass or return the argument.  CUM is the cumulative
    state for earlier arguments.  MODE is the mode of this argument and
@@ -3812,6 +3882,9 @@  riscv_get_arg_info (struct riscv_arg_info *info, const CUMULATIVE_ARGS *cum,
 	}
     }
 
+  /* Only check existing of vector type.  */
+  riscv_pass_in_vector_p (type);
+
   /* Work out the size of the argument.  */
   num_bytes = type ? int_size_in_bytes (type) : GET_MODE_SIZE (mode).to_constant ();
   num_words = (num_bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
diff --git a/gcc/testsuite/gcc.target/riscv/vector-abi-1.c b/gcc/testsuite/gcc.target/riscv/vector-abi-1.c
new file mode 100644
index 00000000000..969f14277a4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/vector-abi-1.c
@@ -0,0 +1,14 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O0 -march=rv64gcv -mabi=lp64d" } */
+
+#include "riscv_vector.h"
+
+void
+fun (vint32m1_t a) { } /* { dg-warning "the scalable vector type" } */
+
+void
+bar ()
+{
+  vint32m1_t a;
+  fun (a);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/vector-abi-2.c b/gcc/testsuite/gcc.target/riscv/vector-abi-2.c
new file mode 100644
index 00000000000..b752760b76f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/vector-abi-2.c
@@ -0,0 +1,14 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "riscv_vector.h"
+
+vint32m1_t
+fun (vint32m1_t* a) {  return *a; }  /* { dg-warning "the scalable vector type" } */
+
+void
+bar ()
+{
+  vint32m1_t a;
+  fun (&a);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/vector-abi-3.c b/gcc/testsuite/gcc.target/riscv/vector-abi-3.c
new file mode 100644
index 00000000000..90ece60cc6f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/vector-abi-3.c
@@ -0,0 +1,14 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "riscv_vector.h"
+
+vint32m1_t*
+fun (vint32m1_t* a) {  return a; }  /* { dg-bogus "the scalable vector type" } */
+
+void
+bar ()
+{
+  vint32m1_t a;
+  fun (&a);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/vector-abi-4.c b/gcc/testsuite/gcc.target/riscv/vector-abi-4.c
new file mode 100644
index 00000000000..ecf6d4cc26b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/vector-abi-4.c
@@ -0,0 +1,16 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "riscv_vector.h"
+
+typedef int v4si __attribute__ ((vector_size (16)));
+
+v4si
+fun (v4si a) {  return a; }  /* { dg-bogus "the scalable vector type" } */
+
+void
+bar ()
+{
+  v4si a;
+  fun (a);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/vector-abi-5.c b/gcc/testsuite/gcc.target/riscv/vector-abi-5.c
new file mode 100644
index 00000000000..6053e0783b6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/vector-abi-5.c
@@ -0,0 +1,15 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+typedef int v4si __attribute__ ((vector_size (16)));
+struct A { int a; v4si b; };
+
+void
+fun (struct A a) {} /* { dg-bogus "the scalable vector type" } */
+
+void
+bar ()
+{
+  struct A a;
+  fun (a);
+}