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(localhost [IPv6:::1]) by gnu-cfl-3.localdomain (Postfix) with ESMTP id 5039F740159; Mon, 16 Jan 2023 10:56:33 -0800 (PST) To: gcc-patches@gcc.gnu.org Cc: Uros Bizjak Subject: [PATCH] x86: Disable -mforce-indirect-call for PIC in 32-bit mode Date: Mon, 16 Jan 2023 10:56:33 -0800 Message-Id: <20230116185633.159901-1-hjl.tools@gmail.com> X-Mailer: git-send-email 2.39.0 MIME-Version: 1.0 X-Spam-Status: No, score=-3025.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Gcc-patches" From: "H.J. Lu" Reply-To: "H.J. Lu" Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" -mforce-indirect-call generates invalid instruction in 32-bit MI thunk since there are no available scratch registers in 32-bit PIC mode. Disable -mforce-indirect-call for PIC in 32-bit mode when generating MI thunk. gcc/ PR target/105980 * config/i386/i386.cc (x86_output_mi_thunk): Disable -mforce-indirect-call for PIC in 32-bit mode. gcc/testsuite/ PR target/105980 * g++.target/i386/pr105980.C: New test. --- gcc/config/i386/i386.cc | 6 ++++++ gcc/testsuite/g++.target/i386/pr105980.C | 8 ++++++++ 2 files changed, 14 insertions(+) create mode 100644 gcc/testsuite/g++.target/i386/pr105980.C diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc index 19fb03cfd44..3cacf738c4a 100644 --- a/gcc/config/i386/i386.cc +++ b/gcc/config/i386/i386.cc @@ -21480,6 +21480,7 @@ x86_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta, rtx this_reg, tmp, fnaddr; unsigned int tmp_regno; rtx_insn *insn; + int saved_flag_force_indirect_call = flag_force_indirect_call; if (TARGET_64BIT) tmp_regno = R10_REG; @@ -21492,6 +21493,9 @@ x86_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta, tmp_regno = DX_REG; else tmp_regno = CX_REG; + + if (flag_pic) + flag_force_indirect_call = 0; } emit_note (NOTE_INSN_PROLOGUE_END); @@ -21659,6 +21663,8 @@ x86_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta, final (insn, file, 1); final_end_function (); assemble_end_function (thunk_fndecl, fnname); + + flag_force_indirect_call = saved_flag_force_indirect_call; } static void diff --git a/gcc/testsuite/g++.target/i386/pr105980.C b/gcc/testsuite/g++.target/i386/pr105980.C new file mode 100644 index 00000000000..d8dbc332ea2 --- /dev/null +++ b/gcc/testsuite/g++.target/i386/pr105980.C @@ -0,0 +1,8 @@ +// { dg-do assemble { target { fpic } } } +// { dg-options "-O0 -fpic -mforce-indirect-call" } + +struct A { + virtual ~A(); +}; +struct B : virtual A {}; +void bar() { B(); }