| Message ID | 20221129134507.185951-3-guojiufu@linux.ibm.com |
|---|---|
| State | New |
| Headers | show |
| Series | [1/3] Use sub mode to move block for struct parameter | expand |
Hi! Some comments on the testcases: On Tue, Nov 29, 2022 at 09:45:07PM +0800, Jiufu Guo wrote: > --- /dev/null > +++ b/gcc/testsuite/gcc.target/powerpc/pr65421-1.c > @@ -0,0 +1,25 @@ > +/* PR target/65421 */ > +/* { dg-do compile } */ > +/* { dg-options "-O2" } */ > +/* { dg-require-effective-target powerpc_elfv2 } */ > + > +typedef struct SA > +{ > + double a[3]; > + long l; > +} A; > + > +/* 2 vec load, 2 vec store. */ > +A ret_arg_pt (A *a){return *a;} > + > +/* 4 std */ > +A ret_arg (A a) {return a;} > + > +/* 4 std */ > +void st_arg (A a, A *p) {*p = a;} > + > +/* { dg-final { scan-assembler-times {\mlxvd2x\M|\mlxv\M|\mlvx\M} 2 } } */ > +/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxv\M|\mstvx\M} 2 } } */ > +/* { dg-final { scan-assembler-times {\mstd\M} 8 } } */ You need at least ISA 2.06 (power7) to have {l,st}xvd2x, and elfv2 does not guarantee that. Have you tested on something old as well (say 970) to see if the lvx/stvx is generated as expected? For that you need to have AltiVec enabled as well, so dg-require that? > --- /dev/null > +++ b/gcc/testsuite/gcc.target/powerpc/pr65421.c > @@ -0,0 +1,22 @@ > +/* PR target/65421 */ > +/* { dg-do compile } */ > +/* { dg-options "-O2" } */ > +/* { dg-require-effective-target powerpc_elfv2 } */ > + > +typedef struct SA > +{ > + double a[3]; > +} A; > + > +/* 3 lfd */ > +A ret_arg_pt (A *a){return *a;} > + > +/* blr */ > +A ret_arg (A a) {return a;} > + > +/* 3 stfd */ > +void st_arg (A a, A *p) {*p = a;} > + > +/* { dg-final { scan-assembler-times {\mlfd\M} 3 } } */ > +/* { dg-final { scan-assembler-times {\mstfd\M} 3 } } */ > +/* { dg-final { scan-assembler-times {(?n)^\s+[a-z]} 9 } } */ Comment that last one? Just something as simple as "count insns" is enough :-) Segher
Hi Segher, Thanks for your comments! Segher Boessenkool <segher@kernel.crashing.org> writes: > Hi! > > Some comments on the testcases: > > On Tue, Nov 29, 2022 at 09:45:07PM +0800, Jiufu Guo wrote: >> --- /dev/null >> +++ b/gcc/testsuite/gcc.target/powerpc/pr65421-1.c >> @@ -0,0 +1,25 @@ >> +/* PR target/65421 */ >> +/* { dg-do compile } */ >> +/* { dg-options "-O2" } */ >> +/* { dg-require-effective-target powerpc_elfv2 } */ >> + >> +typedef struct SA >> +{ >> + double a[3]; >> + long l; >> +} A; >> + >> +/* 2 vec load, 2 vec store. */ >> +A ret_arg_pt (A *a){return *a;} >> + >> +/* 4 std */ >> +A ret_arg (A a) {return a;} >> + >> +/* 4 std */ >> +void st_arg (A a, A *p) {*p = a;} >> + >> +/* { dg-final { scan-assembler-times {\mlxvd2x\M|\mlxv\M|\mlvx\M} 2 } } */ >> +/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxv\M|\mstvx\M} 2 } } */ >> +/* { dg-final { scan-assembler-times {\mstd\M} 8 } } */ > > You need at least ISA 2.06 (power7) to have {l,st}xvd2x, and elfv2 does > not guarantee that. Have you tested on something old as well (say 970) > to see if the lvx/stvx is generated as expected? For that you need to > have AltiVec enabled as well, so dg-require that? Thanks a lot for point out this! Compiling this case on power7 manually, it does not generate these vector load/store insns. To check those insns, power7 is needed. > >> --- /dev/null >> +++ b/gcc/testsuite/gcc.target/powerpc/pr65421.c >> @@ -0,0 +1,22 @@ >> +/* PR target/65421 */ >> +/* { dg-do compile } */ >> +/* { dg-options "-O2" } */ >> +/* { dg-require-effective-target powerpc_elfv2 } */ >> + >> +typedef struct SA >> +{ >> + double a[3]; >> +} A; >> + >> +/* 3 lfd */ >> +A ret_arg_pt (A *a){return *a;} >> + >> +/* blr */ >> +A ret_arg (A a) {return a;} >> + >> +/* 3 stfd */ >> +void st_arg (A a, A *p) {*p = a;} >> + >> +/* { dg-final { scan-assembler-times {\mlfd\M} 3 } } */ >> +/* { dg-final { scan-assembler-times {\mstfd\M} 3 } } */ >> +/* { dg-final { scan-assembler-times {(?n)^\s+[a-z]} 9 } } */ > > Comment that last one? Just something as simple as "count insns" is > enough :-) Sure, thanks! BR, Jeff (Jiufu) > > > Segher
diff --git a/gcc/testsuite/gcc.target/powerpc/pr65421-1.c b/gcc/testsuite/gcc.target/powerpc/pr65421-1.c new file mode 100644 index 00000000000..a5ea675008e --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr65421-1.c @@ -0,0 +1,25 @@ +/* PR target/65421 */ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-require-effective-target powerpc_elfv2 } */ + +typedef struct SA +{ + double a[3]; + long l; +} A; + +/* 2 vec load, 2 vec store. */ +A ret_arg_pt (A *a){return *a;} + +/* 4 std */ +A ret_arg (A a) {return a;} + +/* 4 std */ +void st_arg (A a, A *p) {*p = a;} + +/* { dg-final { scan-assembler-times {\mlxvd2x\M|\mlxv\M|\mlvx\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxv\M|\mstvx\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mstd\M} 8 } } */ + + diff --git a/gcc/testsuite/gcc.target/powerpc/pr65421.c b/gcc/testsuite/gcc.target/powerpc/pr65421.c new file mode 100644 index 00000000000..27f69e24e29 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr65421.c @@ -0,0 +1,22 @@ +/* PR target/65421 */ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-require-effective-target powerpc_elfv2 } */ + +typedef struct SA +{ + double a[3]; +} A; + +/* 3 lfd */ +A ret_arg_pt (A *a){return *a;} + +/* blr */ +A ret_arg (A a) {return a;} + +/* 3 stfd */ +void st_arg (A a, A *p) {*p = a;} + +/* { dg-final { scan-assembler-times {\mlfd\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mstfd\M} 3 } } */ +/* { dg-final { scan-assembler-times {(?n)^\s+[a-z]} 9 } } */
Hi, This patch is just add test cases, and tested on ppc64{,le}. With previous patches on this serial passed, Bootstrap and regtest passed on ppc64{,le} and x86_64. Is this ok for trunk? BR, Jeff (Jiufu) PR target/65421 gcc/testsuite/ChangeLog: * gcc.target/powerpc/pr65421-1.c: New test. * gcc.target/powerpc/pr65421.c: New test. --- gcc/testsuite/gcc.target/powerpc/pr65421-1.c | 25 ++++++++++++++++++++ gcc/testsuite/gcc.target/powerpc/pr65421.c | 22 +++++++++++++++++ 2 files changed, 47 insertions(+) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr65421-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr65421.c