From patchwork Thu Jan 20 15:45:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Earnshaw X-Patchwork-Id: 1582201 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=wk8rik8y; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4Jfn1H6NRGz9t25 for ; Fri, 21 Jan 2022 02:46:27 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 0CDDB3857814 for ; Thu, 20 Jan 2022 15:46:25 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 0CDDB3857814 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1642693585; bh=vJ79TZNSRWGLHVBRL/bHOQG/qiQE70GpGj+9KyCIsRg=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=wk8rik8yJ3uNDOsD+nFICkldnAY5buh8lL4MHhMDroX0923l/no2+orh2LfYkdMNV hoqd3vZudJbNGQwR+ZkHb1l+9WWDYkFBccN9yzqcwO+YiFckovGTZbhyIVAp+AMo0O Q9SyXqWJACYIfE3EuUoR8ILOm4BcMHI92VD+cZKw= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id DF3733858407 for ; Thu, 20 Jan 2022 15:46:01 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org DF3733858407 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6C9C3101E; Thu, 20 Jan 2022 07:46:01 -0800 (PST) Received: from e126323.arm.com (unknown [10.57.36.197]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E10B23F73D; Thu, 20 Jan 2022 07:46:00 -0800 (PST) To: GCC Patches Subject: [PATCH] aarch64: allow ld1/stq in test output [PR102517] Date: Thu, 20 Jan 2022 15:45:28 +0000 Message-Id: <20220120154528.837764-1-rearnsha@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Spam-Status: No, score=-13.7 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Richard Earnshaw via Gcc-patches From: Richard Earnshaw Reply-To: Richard Earnshaw Cc: Richard Earnshaw Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Following the changes to the inline memcpy operations get expanded, we now generate ld1/st1 using a 128-bit vector register rather than ldp with Q registers. The behaviour is equivalent, so relax the tests to permit either variant. gcc/testsuite/ChangeLog: PR target/102517 * gcc.target/aarch64/cpymem-q-reg_1.c: Allow ld1 and st1 for the memcpy expansion. --- gcc/testsuite/gcc.target/aarch64/cpymem-q-reg_1.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/testsuite/gcc.target/aarch64/cpymem-q-reg_1.c b/gcc/testsuite/gcc.target/aarch64/cpymem-q-reg_1.c index df5f67e425b..45f3f0ad144 100644 --- a/gcc/testsuite/gcc.target/aarch64/cpymem-q-reg_1.c +++ b/gcc/testsuite/gcc.target/aarch64/cpymem-q-reg_1.c @@ -10,7 +10,7 @@ foo (void) __builtin_memcpy (dst, src, N * sizeof (int)); } -/* { dg-final { scan-assembler {ldp\tq[0-9]*} } } */ +/* { dg-final { scan-assembler {ldp\tq[0-9]*|ld1\t{v[0-9]*\.16b - v[0-9]*\.16b}} } } */ /* { dg-final { scan-assembler-not {ldp\tx[0-9]*} } } */ -/* { dg-final { scan-assembler {stp\tq[0-9]*} } } */ +/* { dg-final { scan-assembler {stp\tq[0-9]*|st1\t{v[0-9]*\.16b - v[0-9]*\.16b}} } } */ /* { dg-final { scan-assembler-not {stp\tx[0-9]*} } } */