From patchwork Thu Sep 2 04:58:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liu, Hongtao" X-Patchwork-Id: 1523472 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=Il8GaxQc; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4H0THL3MPMz9sPf for ; Thu, 2 Sep 2021 14:59:25 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 75F24385E826 for ; Thu, 2 Sep 2021 04:59:22 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 75F24385E826 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1630558762; bh=zZQwU4R0sr1PB4IXyWIMex0x8EVhVhwImqS8NUXAVxs=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=Il8GaxQcXgT66wLdYBPl0xVJg24jEktWwliEG3zeLxY7x+hELCR6ykQOR1/Iu8XFO epuaWI0qye4hRYM8VPTDMHxJjWn/EP1uOSMXOJ/QKoFh5Uygv97+iFepeJxyJksJV+ 4oejbplIxwjEsWNfGp7IeBUSyQuIqWfigyZJWEVQ= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by sourceware.org (Postfix) with ESMTPS id DA1973857823 for ; Thu, 2 Sep 2021 04:59:00 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org DA1973857823 X-IronPort-AV: E=McAfee;i="6200,9189,10094"; a="219026912" X-IronPort-AV: E=Sophos;i="5.84,371,1620716400"; d="scan'208";a="219026912" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Sep 2021 21:58:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,371,1620716400"; d="scan'208";a="577952649" Received: from scymds01.sc.intel.com ([10.148.94.138]) by orsmga004.jf.intel.com with ESMTP; 01 Sep 2021 21:58:59 -0700 Received: from shliclel219.sh.intel.com (shliclel219.sh.intel.com [10.239.236.219]) by scymds01.sc.intel.com with ESMTP id 1824wvgb023512; Wed, 1 Sep 2021 21:58:58 -0700 To: gcc-patches@gcc.gnu.org Subject: [PATCH] Remove macro check for __AMX_BF16/INT8/TILE__ in header file. Date: Thu, 2 Sep 2021 12:58:57 +0800 Message-Id: <20210902045857.3926805-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: liuhongt via Gcc-patches From: "Liu, Hongtao" Reply-To: liuhongt Cc: thiago@kde.org Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Hi: Details discussed in PR. Bootstrapped and regtested on x86-64_linux-gnu{-m32,}. Pushed to master and GCC-11. gcc/ChangeLog: PR target/102166 * config/i386/amxbf16intrin.h : Remove macro check for __AMX_BF16__. * config/i386/amxint8intrin.h : Remove macro check for __AMX_INT8__. * config/i386/amxtileintrin.h : Remove macro check for __AMX_TILE__. gcc/testsuite/ChangeLog: PR target/102166 * g++.target/i386/pr102166.C: New test. --- gcc/config/i386/amxbf16intrin.h | 2 +- gcc/config/i386/amxint8intrin.h | 2 +- gcc/config/i386/amxtileintrin.h | 2 +- gcc/testsuite/g++.target/i386/pr102166.C | 20 ++++++++++++++++++++ 4 files changed, 23 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/g++.target/i386/pr102166.C diff --git a/gcc/config/i386/amxbf16intrin.h b/gcc/config/i386/amxbf16intrin.h index 8c24cdd50a0..1d60e8e609f 100644 --- a/gcc/config/i386/amxbf16intrin.h +++ b/gcc/config/i386/amxbf16intrin.h @@ -34,7 +34,7 @@ #define __DISABLE_AMX_BF16__ #endif /* __AMX_BF16__ */ -#if defined(__x86_64__) && defined(__AMX_BF16__) +#if defined(__x86_64__) #define _tile_dpbf16ps_internal(dst,src1,src2) \ __asm__ volatile\ ("{tdpbf16ps\t%%tmm"#src2", %%tmm"#src1", %%tmm"#dst"|tdpbf16ps\t%%tmm"#dst", %%tmm"#src1", %%tmm"#src2"}" ::) diff --git a/gcc/config/i386/amxint8intrin.h b/gcc/config/i386/amxint8intrin.h index 180c2436278..dbb7b6cc5ad 100644 --- a/gcc/config/i386/amxint8intrin.h +++ b/gcc/config/i386/amxint8intrin.h @@ -34,7 +34,7 @@ #define __DISABLE_AMX_INT8__ #endif /* __AMX_INT8__ */ -#if defined(__x86_64__) && defined(__AMX_INT8__) +#if defined(__x86_64__) #define _tile_int8_dp_internal(name,dst,src1,src2) \ __asm__ volatile \ ("{"#name"\t%%tmm"#src2", %%tmm"#src1", %%tmm"#dst"|"#name"\t%%tmm"#dst", %%tmm"#src1", %%tmm"#src2"}" ::) diff --git a/gcc/config/i386/amxtileintrin.h b/gcc/config/i386/amxtileintrin.h index 16c8b6ef681..75d784ad160 100644 --- a/gcc/config/i386/amxtileintrin.h +++ b/gcc/config/i386/amxtileintrin.h @@ -34,7 +34,7 @@ #define __DISABLE_AMX_TILE__ #endif /* __AMX_TILE__ */ -#if defined(__x86_64__) && defined(__AMX_TILE__) +#if defined(__x86_64__) extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _tile_loadconfig (const void *__config) diff --git a/gcc/testsuite/g++.target/i386/pr102166.C b/gcc/testsuite/g++.target/i386/pr102166.C new file mode 100644 index 00000000000..751cd2c6d26 --- /dev/null +++ b/gcc/testsuite/g++.target/i386/pr102166.C @@ -0,0 +1,20 @@ +/* PR target/102166 */ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -std=c++14" } */ + +#include +__attribute__((target("amx-tile"))) void amx() +{ + _tile_loadd(0, 0, 0); + _tile_release(); +} + +__attribute__((target("amx-int8"))) void amxint8() +{ + _tile_dpbssd(0, 1, 2); +} + +__attribute__((target("amx-bf16"))) void amxbf16() +{ + _tile_dpbf16ps (0, 1, 2); +}