| Message ID | 20210721122315.55848-1-hjl.tools@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | x86: Remove OPTION_MASK_ISA_SSE4_2 from CRC32 _builtin functions | expand |
V sre., 21. jul. 2021 14:23 je oseba H.J. Lu <hjl.tools@gmail.com> napisala: > Since > > commit 39671f87b2df6a1894cc11a161e4a7949d1ddccd > Author: H.J. Lu <hjl.tools@gmail.com> > Date: Thu Apr 15 05:59:48 2021 -0700 > > x86: Use crc32 target option for CRC32 intrinsics > > enabled OPTION_MASK_ISA_CRC32 for -msse4 and removed TARGET_SSE4_2 check > in sse4_2_crc32<mode> pattens, remove OPTION_MASK_ISA_SSE4_2 from CRC32 > _builtin functions. > > gcc/ > > PR target/101549 > * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_SSE4_2 > from CRC32 _builtin functions. > > gcc/testsuite/ > > PR target/101549 > * gcc.target/i386/crc32-6.c: New test. > OK. Thanks, Uros. --- > gcc/config/i386/i386-builtin.def | 8 ++++---- > gcc/testsuite/gcc.target/i386/crc32-6.c | 13 +++++++++++++ > 2 files changed, 17 insertions(+), 4 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/i386/crc32-6.c > > diff --git a/gcc/config/i386/i386-builtin.def > b/gcc/config/i386/i386-builtin.def > index 1cc0cc6968c..4b1ae0eb84c 100644 > --- a/gcc/config/i386/i386-builtin.def > +++ b/gcc/config/i386/i386-builtin.def > @@ -970,10 +970,10 @@ BDESC (OPTION_MASK_ISA_SSE4_1, 0, > CODE_FOR_sse4_1_ptestv2di, "__builtin_ia32_pte > > /* SSE4.2 */ > BDESC (OPTION_MASK_ISA_SSE4_2, 0, CODE_FOR_nothing, > "__builtin_ia32_pcmpgtq", IX86_BUILTIN_PCMPGTQ, UNKNOWN, (int) > V2DI_FTYPE_V2DI_V2DI) > -BDESC (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32, 0, > CODE_FOR_sse4_2_crc32qi, "__builtin_ia32_crc32qi", IX86_BUILTIN_CRC32QI, > UNKNOWN, (int) UINT_FTYPE_UINT_UCHAR) > -BDESC (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32, 0, > CODE_FOR_sse4_2_crc32hi, "__builtin_ia32_crc32hi", IX86_BUILTIN_CRC32HI, > UNKNOWN, (int) UINT_FTYPE_UINT_USHORT) > -BDESC (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32, 0, > CODE_FOR_sse4_2_crc32si, "__builtin_ia32_crc32si", IX86_BUILTIN_CRC32SI, > UNKNOWN, (int) UINT_FTYPE_UINT_UINT) > -BDESC (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32 | > OPTION_MASK_ISA_64BIT, 0, CODE_FOR_sse4_2_crc32di, > "__builtin_ia32_crc32di", IX86_BUILTIN_CRC32DI, UNKNOWN, (int) > UINT64_FTYPE_UINT64_UINT64) > +BDESC (OPTION_MASK_ISA_CRC32, 0, CODE_FOR_sse4_2_crc32qi, > "__builtin_ia32_crc32qi", IX86_BUILTIN_CRC32QI, UNKNOWN, (int) > UINT_FTYPE_UINT_UCHAR) > +BDESC (OPTION_MASK_ISA_CRC32, 0, CODE_FOR_sse4_2_crc32hi, > "__builtin_ia32_crc32hi", IX86_BUILTIN_CRC32HI, UNKNOWN, (int) > UINT_FTYPE_UINT_USHORT) > +BDESC (OPTION_MASK_ISA_CRC32, 0, CODE_FOR_sse4_2_crc32si, > "__builtin_ia32_crc32si", IX86_BUILTIN_CRC32SI, UNKNOWN, (int) > UINT_FTYPE_UINT_UINT) > +BDESC (OPTION_MASK_ISA_CRC32 | OPTION_MASK_ISA_64BIT, 0, > CODE_FOR_sse4_2_crc32di, "__builtin_ia32_crc32di", IX86_BUILTIN_CRC32DI, > UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64) > > /* SSE4A */ > BDESC (OPTION_MASK_ISA_SSE4A, 0, CODE_FOR_sse4a_extrqi, > "__builtin_ia32_extrqi", IX86_BUILTIN_EXTRQI, UNKNOWN, (int) > V2DI_FTYPE_V2DI_UINT_UINT) > diff --git a/gcc/testsuite/gcc.target/i386/crc32-6.c > b/gcc/testsuite/gcc.target/i386/crc32-6.c > new file mode 100644 > index 00000000000..464e3444069 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/crc32-6.c > @@ -0,0 +1,13 @@ > +/* PR target/101549 */ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -msse4 -mno-crc32" } */ > + > +#include <immintrin.h> > + > +unsigned int > +test_mm_crc32_u8 (unsigned int CRC, unsigned char V) > +{ > + return _mm_crc32_u8 (CRC, V); > +} > + > +/* { dg-error "needs isa option -mcrc32" "" { target *-*-* } 0 } */ > -- > 2.31.1 > >
diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def index 1cc0cc6968c..4b1ae0eb84c 100644 --- a/gcc/config/i386/i386-builtin.def +++ b/gcc/config/i386/i386-builtin.def @@ -970,10 +970,10 @@ BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_ptestv2di, "__builtin_ia32_pte /* SSE4.2 */ BDESC (OPTION_MASK_ISA_SSE4_2, 0, CODE_FOR_nothing, "__builtin_ia32_pcmpgtq", IX86_BUILTIN_PCMPGTQ, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI) -BDESC (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32, 0, CODE_FOR_sse4_2_crc32qi, "__builtin_ia32_crc32qi", IX86_BUILTIN_CRC32QI, UNKNOWN, (int) UINT_FTYPE_UINT_UCHAR) -BDESC (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32, 0, CODE_FOR_sse4_2_crc32hi, "__builtin_ia32_crc32hi", IX86_BUILTIN_CRC32HI, UNKNOWN, (int) UINT_FTYPE_UINT_USHORT) -BDESC (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32, 0, CODE_FOR_sse4_2_crc32si, "__builtin_ia32_crc32si", IX86_BUILTIN_CRC32SI, UNKNOWN, (int) UINT_FTYPE_UINT_UINT) -BDESC (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32 | OPTION_MASK_ISA_64BIT, 0, CODE_FOR_sse4_2_crc32di, "__builtin_ia32_crc32di", IX86_BUILTIN_CRC32DI, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64) +BDESC (OPTION_MASK_ISA_CRC32, 0, CODE_FOR_sse4_2_crc32qi, "__builtin_ia32_crc32qi", IX86_BUILTIN_CRC32QI, UNKNOWN, (int) UINT_FTYPE_UINT_UCHAR) +BDESC (OPTION_MASK_ISA_CRC32, 0, CODE_FOR_sse4_2_crc32hi, "__builtin_ia32_crc32hi", IX86_BUILTIN_CRC32HI, UNKNOWN, (int) UINT_FTYPE_UINT_USHORT) +BDESC (OPTION_MASK_ISA_CRC32, 0, CODE_FOR_sse4_2_crc32si, "__builtin_ia32_crc32si", IX86_BUILTIN_CRC32SI, UNKNOWN, (int) UINT_FTYPE_UINT_UINT) +BDESC (OPTION_MASK_ISA_CRC32 | OPTION_MASK_ISA_64BIT, 0, CODE_FOR_sse4_2_crc32di, "__builtin_ia32_crc32di", IX86_BUILTIN_CRC32DI, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64) /* SSE4A */ BDESC (OPTION_MASK_ISA_SSE4A, 0, CODE_FOR_sse4a_extrqi, "__builtin_ia32_extrqi", IX86_BUILTIN_EXTRQI, UNKNOWN, (int) V2DI_FTYPE_V2DI_UINT_UINT) diff --git a/gcc/testsuite/gcc.target/i386/crc32-6.c b/gcc/testsuite/gcc.target/i386/crc32-6.c new file mode 100644 index 00000000000..464e3444069 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/crc32-6.c @@ -0,0 +1,13 @@ +/* PR target/101549 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse4 -mno-crc32" } */ + +#include <immintrin.h> + +unsigned int +test_mm_crc32_u8 (unsigned int CRC, unsigned char V) +{ + return _mm_crc32_u8 (CRC, V); +} + +/* { dg-error "needs isa option -mcrc32" "" { target *-*-* } 0 } */
Since commit 39671f87b2df6a1894cc11a161e4a7949d1ddccd Author: H.J. Lu <hjl.tools@gmail.com> Date: Thu Apr 15 05:59:48 2021 -0700 x86: Use crc32 target option for CRC32 intrinsics enabled OPTION_MASK_ISA_CRC32 for -msse4 and removed TARGET_SSE4_2 check in sse4_2_crc32<mode> pattens, remove OPTION_MASK_ISA_SSE4_2 from CRC32 _builtin functions. gcc/ PR target/101549 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_SSE4_2 from CRC32 _builtin functions. gcc/testsuite/ PR target/101549 * gcc.target/i386/crc32-6.c: New test. --- gcc/config/i386/i386-builtin.def | 8 ++++---- gcc/testsuite/gcc.target/i386/crc32-6.c | 13 +++++++++++++ 2 files changed, 17 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/crc32-6.c