From patchwork Wed Jul 14 08:18:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Trevor Saunders X-Patchwork-Id: 1505047 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GPr7j6Hlmz9sXb for ; Wed, 14 Jul 2021 18:21:37 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A26C5398241B for ; Wed, 14 Jul 2021 08:21:35 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from paperclip.tbsaunde.org (tbsaunde.org [66.228.47.254]) by sourceware.org (Postfix) with ESMTP id 854EE397EC27 for ; Wed, 14 Jul 2021 08:18:44 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 854EE397EC27 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=tbsaunde.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=tbsaunde.org Received: from caber.home (pool-108-24-42-131.cmdnnj.fios.verizon.net [108.24.42.131]) by paperclip.tbsaunde.org (Postfix) with ESMTPSA id 5AD34C08A; Wed, 14 Jul 2021 08:18:44 +0000 (UTC) From: Trevor Saunders To: gcc-patches@gcc.gnu.org Subject: [PATCH 4/4] pass location to md_asm_adjust Date: Wed, 14 Jul 2021 04:18:27 -0400 Message-Id: <20210714081827.12185-4-tbsaunde@tbsaunde.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210714081827.12185-1-tbsaunde@tbsaunde.org> References: <20210714081827.12185-1-tbsaunde@tbsaunde.org> MIME-Version: 1.0 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Trevor Saunders Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" So the hook can use it as the location of diagnostics. bootstrapped and regtested on x86_64-linux-gnu, also tested one make all-gcc for each effected cpu, ok? Trev gcc/ChangeLog: * cfgexpand.c (expand_asm_loc): Adjust. (expand_asm_stmt): Likewise. * config/arm/aarch-common-protos.h (arm_md_asm_adjust): Likewise. * config/arm/aarch-common.c (arm_md_asm_adjust): Likewise. * config/arm/arm.c (thumb1_md_asm_adjust): Likewise. * config/avr/avr.c (avr_md_asm_adjust): Likewise. * config/cris/cris.c (cris_md_asm_adjust): Likewise. * config/i386/i386.c (ix86_md_asm_adjust): Likewise. * config/mn10300/mn10300.c (mn10300_md_asm_adjust): Likewise. * config/nds32/nds32.c (nds32_md_asm_adjust): Likewise. * config/pdp11/pdp11.c (pdp11_md_asm_adjust): Likewise. * config/rs6000/rs6000.c (rs6000_md_asm_adjust): Likewise. * config/s390/s390.c (s390_md_asm_adjust): Likewise. * config/vax/vax.c (vax_md_asm_adjust): Likewise. * config/visium/visium.c (visium_md_asm_adjust): Likewise. * doc/tm.texi: Regenerate. * target.def: Add location argument to md_asm_adjust. --- gcc/cfgexpand.c | 9 +++++---- gcc/config/arm/aarch-common-protos.h | 3 ++- gcc/config/arm/aarch-common.c | 8 ++++---- gcc/config/arm/arm.c | 4 ++-- gcc/config/avr/avr.c | 3 ++- gcc/config/cris/cris.c | 4 ++-- gcc/config/i386/i386.c | 8 ++++---- gcc/config/mn10300/mn10300.c | 2 +- gcc/config/nds32/nds32.c | 3 ++- gcc/config/pdp11/pdp11.c | 4 ++-- gcc/config/rs6000/rs6000.c | 2 +- gcc/config/s390/s390.c | 2 +- gcc/config/vax/vax.c | 5 +++-- gcc/config/visium/visium.c | 4 ++-- gcc/doc/tm.texi | 5 +++-- gcc/target.def | 5 +++-- 16 files changed, 39 insertions(+), 32 deletions(-) diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c index 46f2960c491..88fd7014941 100644 --- a/gcc/cfgexpand.c +++ b/gcc/cfgexpand.c @@ -2897,7 +2897,8 @@ expand_asm_loc (tree string, int vol, location_t locus) if (targetm.md_asm_adjust) targetm.md_asm_adjust (output_rvec, input_rvec, input_mode, - constraints, clobber_rvec, clobbered_regs); + constraints, clobber_rvec, clobbered_regs, + locus); asm_op = body; nclobbers = clobber_rvec.length (); @@ -3074,8 +3075,7 @@ expand_asm_stmt (gasm *stmt) return; } - /* There are some legacy diagnostics in here, and also avoids an extra - parameter to targetm.md_asm_adjust. */ + /* There are some legacy diagnostics in here. */ save_input_location s_i_l(locus); unsigned noutputs = gimple_asm_noutputs (stmt); @@ -3456,7 +3456,8 @@ expand_asm_stmt (gasm *stmt) if (targetm.md_asm_adjust) after_md_seq = targetm.md_asm_adjust (output_rvec, input_rvec, input_mode, - constraints, clobber_rvec, clobbered_regs); + constraints, clobber_rvec, clobbered_regs, + locus); /* Do not allow the hook to change the output and input count, lest it mess up the operand numbering. */ diff --git a/gcc/config/arm/aarch-common-protos.h b/gcc/config/arm/aarch-common-protos.h index b6171e8668d..6be5fb1e083 100644 --- a/gcc/config/arm/aarch-common-protos.h +++ b/gcc/config/arm/aarch-common-protos.h @@ -147,6 +147,7 @@ struct cpu_cost_table rtx_insn *arm_md_asm_adjust (vec &outputs, vec & /*inputs*/, vec & /*input_modes*/, vec &constraints, - vec &clobbers, HARD_REG_SET &clobbered_regs); + vec &clobbers, HARD_REG_SET &clobbered_regs, + location_t loc); #endif /* GCC_AARCH_COMMON_PROTOS_H */ diff --git a/gcc/config/arm/aarch-common.c b/gcc/config/arm/aarch-common.c index 0dbdc56f542..67343fe4025 100644 --- a/gcc/config/arm/aarch-common.c +++ b/gcc/config/arm/aarch-common.c @@ -534,7 +534,7 @@ rtx_insn * arm_md_asm_adjust (vec &outputs, vec & /*inputs*/, vec & /*input_modes*/, vec &constraints, vec & /*clobbers*/, - HARD_REG_SET & /*clobbered_regs*/) + HARD_REG_SET & /*clobbered_regs*/, location_t loc) { bool saw_asm_flag = false; @@ -547,7 +547,7 @@ arm_md_asm_adjust (vec &outputs, vec & /*inputs*/, con += 4; if (strchr (con, ',') != NULL) { - error ("alternatives not allowed in % flag output"); + error_at (loc, "alternatives not allowed in % flag output"); continue; } @@ -608,7 +608,7 @@ arm_md_asm_adjust (vec &outputs, vec & /*inputs*/, mode = CC_Vmode, code = NE; break; default: - error ("unknown % flag output %qs", constraints[i]); + error_at (loc, "unknown % flag output %qs", constraints[i]); continue; } @@ -618,7 +618,7 @@ arm_md_asm_adjust (vec &outputs, vec & /*inputs*/, machine_mode dest_mode = GET_MODE (dest); if (!SCALAR_INT_MODE_P (dest_mode)) { - error ("invalid type for % flag output"); + error_at (loc, "invalid type for % flag output"); continue; } diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index de37c903450..6d781e23ee9 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -333,7 +333,7 @@ static HOST_WIDE_INT arm_constant_alignment (const_tree, HOST_WIDE_INT); static rtx_insn *thumb1_md_asm_adjust (vec &, vec &, vec &, vec &, vec &, - HARD_REG_SET &); + HARD_REG_SET &, location_t); /* Table of machine attributes. */ static const struct attribute_spec arm_attribute_table[] = @@ -34105,7 +34105,7 @@ rtx_insn * thumb1_md_asm_adjust (vec &outputs, vec & /*inputs*/, vec & /*input_modes*/, vec &constraints, vec & /*clobbers*/, - HARD_REG_SET & /*clobbered_regs*/) + HARD_REG_SET & /*clobbered_regs*/, location_t /*loc*/) { for (unsigned i = 0, n = outputs.length (); i < n; ++i) if (startswith (constraints[i], "=@cc")) diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c index c95c436180c..200701a583c 100644 --- a/gcc/config/avr/avr.c +++ b/gcc/config/avr/avr.c @@ -14498,7 +14498,8 @@ static rtx_insn * avr_md_asm_adjust (vec &/*outputs*/, vec &/*inputs*/, vec & /*input_modes*/, vec &/*constraints*/, - vec &clobbers, HARD_REG_SET &clobbered_regs) + vec &clobbers, HARD_REG_SET &clobbered_regs, + location_t /*loc*/) { clobbers.safe_push (cc_reg_rtx); SET_HARD_REG_BIT (clobbered_regs, REG_CC); diff --git a/gcc/config/cris/cris.c b/gcc/config/cris/cris.c index d9213d7ffb6..f458ea0c53e 100644 --- a/gcc/config/cris/cris.c +++ b/gcc/config/cris/cris.c @@ -151,7 +151,7 @@ static void cris_function_arg_advance (cumulative_args_t, const function_arg_info &); static rtx_insn *cris_md_asm_adjust (vec &, vec &, vec &, vec &, - vec &, HARD_REG_SET &); + vec &, HARD_REG_SET &, location_t); static void cris_option_override (void); @@ -3507,7 +3507,7 @@ static rtx_insn * cris_md_asm_adjust (vec &outputs, vec &inputs, vec & /*input_modes*/, vec &constraints, vec &clobbers, - HARD_REG_SET &clobbered_regs) + HARD_REG_SET &clobbered_regs, location_t /*loc*/) { /* For the time being, all asms clobber condition codes. Revisit when there's a reasonable use for inputs/outputs diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index cff26909292..530d3572965 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -21596,7 +21596,7 @@ static rtx_insn * ix86_md_asm_adjust (vec &outputs, vec & /*inputs*/, vec & /*input_modes*/, vec &constraints, vec &clobbers, - HARD_REG_SET &clobbered_regs) + HARD_REG_SET &clobbered_regs, location_t loc) { bool saw_asm_flag = false; @@ -21609,7 +21609,7 @@ ix86_md_asm_adjust (vec &outputs, vec & /*inputs*/, con += 4; if (strchr (con, ',') != NULL) { - error ("alternatives not allowed in % flag output"); + error_at (loc, "alternatives not allowed in % flag output"); continue; } @@ -21673,7 +21673,7 @@ ix86_md_asm_adjust (vec &outputs, vec & /*inputs*/, } if (code == UNKNOWN) { - error ("unknown % flag output %qs", constraints[i]); + error_at (loc, "unknown % flag output %qs", constraints[i]); continue; } if (invert) @@ -21702,7 +21702,7 @@ ix86_md_asm_adjust (vec &outputs, vec & /*inputs*/, machine_mode dest_mode = GET_MODE (dest); if (!SCALAR_INT_MODE_P (dest_mode)) { - error ("invalid type for % flag output"); + error_at (loc, "invalid type for % flag output"); continue; } diff --git a/gcc/config/mn10300/mn10300.c b/gcc/config/mn10300/mn10300.c index c1c2e6e3b5c..6f842a3ad32 100644 --- a/gcc/config/mn10300/mn10300.c +++ b/gcc/config/mn10300/mn10300.c @@ -2850,7 +2850,7 @@ static rtx_insn * mn10300_md_asm_adjust (vec & /*outputs*/, vec & /*inputs*/, vec & /*input_modes*/, vec & /*constraints*/, vec &clobbers, - HARD_REG_SET &clobbered_regs) + HARD_REG_SET &clobbered_regs, location_t /*loc*/) { clobbers.safe_push (gen_rtx_REG (CCmode, CC_REG)); SET_HARD_REG_BIT (clobbered_regs, CC_REG); diff --git a/gcc/config/nds32/nds32.c b/gcc/config/nds32/nds32.c index 7217d7879b6..2c9cfcf322a 100644 --- a/gcc/config/nds32/nds32.c +++ b/gcc/config/nds32/nds32.c @@ -4199,7 +4199,8 @@ nds32_md_asm_adjust (vec &outputs ATTRIBUTE_UNUSED, vec &inputs ATTRIBUTE_UNUSED, vec &input_modes ATTRIBUTE_UNUSED, vec &constraints ATTRIBUTE_UNUSED, - vec &clobbers, HARD_REG_SET &clobbered_regs) + vec &clobbers, HARD_REG_SET &clobbered_regs, + location_t /*loc*/) { if (!flag_inline_asm_r15) { diff --git a/gcc/config/pdp11/pdp11.c b/gcc/config/pdp11/pdp11.c index 4cab3aee598..ced653116a4 100644 --- a/gcc/config/pdp11/pdp11.c +++ b/gcc/config/pdp11/pdp11.c @@ -156,7 +156,7 @@ static int pdp11_addr_cost (rtx, machine_mode, addr_space_t, bool); static int pdp11_insn_cost (rtx_insn *insn, bool speed); static rtx_insn *pdp11_md_asm_adjust (vec &, vec &, vec &, vec &, - vec &, HARD_REG_SET &); + vec &, HARD_REG_SET &, location_t); static bool pdp11_return_in_memory (const_tree, const_tree); static rtx pdp11_function_value (const_tree, const_tree, bool); static rtx pdp11_libcall_value (machine_mode, const_rtx); @@ -2139,7 +2139,7 @@ static rtx_insn * pdp11_md_asm_adjust (vec & /*outputs*/, vec & /*inputs*/, vec & /*input_modes*/, vec & /*constraints*/, vec &clobbers, - HARD_REG_SET &clobbered_regs) + HARD_REG_SET &clobbered_regs, location_t /*loc*/) { clobbers.safe_push (gen_rtx_REG (CCmode, CC_REGNUM)); SET_HARD_REG_BIT (clobbered_regs, CC_REGNUM); diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index de11de5e079..d14c51db193 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -3444,7 +3444,7 @@ static rtx_insn * rs6000_md_asm_adjust (vec & /*outputs*/, vec & /*inputs*/, vec & /*input_modes*/, vec & /*constraints*/, vec &clobbers, - HARD_REG_SET &clobbered_regs) + HARD_REG_SET &clobbered_regs, location_t /*loc*/) { clobbers.safe_push (gen_rtx_REG (SImode, CA_REGNO)); SET_HARD_REG_BIT (clobbered_regs, CA_REGNO); diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index 590dd8f35bc..800e0abc016 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -16771,7 +16771,7 @@ static rtx_insn * s390_md_asm_adjust (vec &outputs, vec &inputs, vec &input_modes, vec &constraints, vec & /*clobbers*/, - HARD_REG_SET & /*clobbered_regs*/) + HARD_REG_SET & /*clobbered_regs*/, location_t /*loc*/) { if (!TARGET_VXE) /* Long doubles are stored in FPR pairs - nothing to do. */ diff --git a/gcc/config/vax/vax.c b/gcc/config/vax/vax.c index 3aacd1e5986..e26ab3b2e8e 100644 --- a/gcc/config/vax/vax.c +++ b/gcc/config/vax/vax.c @@ -57,7 +57,7 @@ static bool vax_rtx_costs (rtx, machine_mode, int, int, int *, bool); static machine_mode vax_cc_modes_compatible (machine_mode, machine_mode); static rtx_insn *vax_md_asm_adjust (vec &, vec &, vec &, vec &, - vec &, HARD_REG_SET &); + vec &, HARD_REG_SET &, location_t); static rtx vax_function_arg (cumulative_args_t, const function_arg_info &); static void vax_function_arg_advance (cumulative_args_t, const function_arg_info &); @@ -1181,7 +1181,8 @@ vax_md_asm_adjust (vec &outputs ATTRIBUTE_UNUSED, vec &inputs ATTRIBUTE_UNUSED, vec &input_modes ATTRIBUTE_UNUSED, vec &constraints ATTRIBUTE_UNUSED, - vec &clobbers, HARD_REG_SET &clobbered_regs) + vec &clobbers, HARD_REG_SET &clobbered_regs, + location_t /*loc*/) { clobbers.safe_push (gen_rtx_REG (CCmode, VAX_PSL_REGNUM)); SET_HARD_REG_BIT (clobbered_regs, VAX_PSL_REGNUM); diff --git a/gcc/config/visium/visium.c b/gcc/config/visium/visium.c index 7eb22485297..58e5355e712 100644 --- a/gcc/config/visium/visium.c +++ b/gcc/config/visium/visium.c @@ -190,7 +190,7 @@ static tree visium_build_builtin_va_list (void); static rtx_insn *visium_md_asm_adjust (vec &, vec &, vec &, vec &, vec &, - HARD_REG_SET &); + HARD_REG_SET &, location_t); static bool visium_legitimate_constant_p (machine_mode, rtx); @@ -795,7 +795,7 @@ static rtx_insn * visium_md_asm_adjust (vec & /*outputs*/, vec & /*inputs*/, vec & /*input_modes*/, vec & /*constraints*/, vec &clobbers, - HARD_REG_SET &clobbered_regs) + HARD_REG_SET &clobbered_regs, location_t /*loc*/) { clobbers.safe_push (gen_rtx_REG (CCmode, FLAGS_REGNUM)); SET_HARD_REG_BIT (clobbered_regs, FLAGS_REGNUM); diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index 2a41ae5fba1..3ad39443eba 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -11708,11 +11708,12 @@ from shared libraries (DLLs). You need not define this macro if it would always evaluate to zero. @end defmac -@deftypefn {Target Hook} {rtx_insn *} TARGET_MD_ASM_ADJUST (vec& @var{outputs}, vec& @var{inputs}, vec& @var{input_modes}, vec& @var{constraints}, vec& @var{clobbers}, HARD_REG_SET& @var{clobbered_regs}) +@deftypefn {Target Hook} {rtx_insn *} TARGET_MD_ASM_ADJUST (vec& @var{outputs}, vec& @var{inputs}, vec& @var{input_modes}, vec& @var{constraints}, vec& @var{clobbers}, HARD_REG_SET& @var{clobbered_regs}, location_t @var{loc}) This target hook may add @dfn{clobbers} to @var{clobbers} and @var{clobbered_regs} for any hard regs the port wishes to automatically clobber for an asm. The @var{outputs} and @var{inputs} may be inspected -to avoid clobbering a register that is already used by the asm. +to avoid clobbering a register that is already used by the asm. @var{loc} +is the source location of the asm. It may modify the @var{outputs}, @var{inputs}, @var{input_modes}, and @var{constraints} as necessary for other pre-processing. In this case the diff --git a/gcc/target.def b/gcc/target.def index c009671c583..2e40448e6c5 100644 --- a/gcc/target.def +++ b/gcc/target.def @@ -4226,7 +4226,8 @@ DEFHOOK "This target hook may add @dfn{clobbers} to @var{clobbers} and\n\ @var{clobbered_regs} for any hard regs the port wishes to automatically\n\ clobber for an asm. The @var{outputs} and @var{inputs} may be inspected\n\ -to avoid clobbering a register that is already used by the asm.\n\ +to avoid clobbering a register that is already used by the asm. @var{loc}\n\ +is the source location of the asm.\n\ \n\ It may modify the @var{outputs}, @var{inputs}, @var{input_modes}, and\n\ @var{constraints} as necessary for other pre-processing. In this case the\n\ @@ -4236,7 +4237,7 @@ to @var{input_modes}.", rtx_insn *, (vec& outputs, vec& inputs, vec& input_modes, vec& constraints, vec& clobbers, - HARD_REG_SET& clobbered_regs), + HARD_REG_SET& clobbered_regs, location_t loc), NULL) /* This target hook allows the backend to specify a calling convention