From patchwork Thu Jul 1 06:16:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: liuhongt X-Patchwork-Id: 1499375 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=dTJoweFj; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GFpv14xGDz9sVb for ; Thu, 1 Jul 2021 16:57:49 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5545D3848015 for ; Thu, 1 Jul 2021 06:57:46 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 5545D3848015 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1625122666; bh=DM35NNp0YTvdo5+MK5YuJs3pmkYAzLQ+YwSq4pw8rMo=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=dTJoweFj1NMnAcUMBHwSXSwj+F/suBE4c1hOhSrfff4381O0fcPO25bn6X5f+k+S0 NnrkPM++t4JBD+ewhlgDQKOzqzHgTfF0uo0ExHf/Q64iqbb9umKTg7s++DzWZxG4LA aokg8ag40PsFTjU+ToaKsnV+9OpaX151+ReUsBkY= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by sourceware.org (Postfix) with ESMTPS id 608B6384F009 for ; Thu, 1 Jul 2021 06:17:50 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 608B6384F009 X-IronPort-AV: E=McAfee;i="6200,9189,10031"; a="269610171" X-IronPort-AV: E=Sophos;i="5.83,313,1616482800"; d="scan'208";a="269610171" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jun 2021 23:17:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.83,313,1616482800"; d="scan'208";a="408822373" Received: from scymds01.sc.intel.com ([10.148.94.138]) by orsmga006.jf.intel.com with ESMTP; 30 Jun 2021 23:17:49 -0700 Received: from shliclel320.sh.intel.com (shliclel320.sh.intel.com [10.239.236.50]) by scymds01.sc.intel.com with ESMTP id 1616GmfF031625; Wed, 30 Jun 2021 23:17:48 -0700 To: gcc-patches@gcc.gnu.org Subject: [PATCH 36/62] AVX512FP16: Add testcase for vcvtph2pd/vcvtph2psx/vcvtpd2ph/vcvtps2phx. Date: Thu, 1 Jul 2021 14:16:22 +0800 Message-Id: <20210701061648.9447-37-hongtao.liu@intel.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20210701061648.9447-1-hongtao.liu@intel.com> References: <20210701061648.9447-1-hongtao.liu@intel.com> X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: liuhongt via Gcc-patches From: liuhongt Reply-To: liuhongt Cc: jakub@redhat.com Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" gcc/testsuite/ChangeLog: * gcc.target/i386/avx512fp16-helper.h (V512): Add DF contents. (src3f): New. * gcc.target/i386/avx512fp16-vcvtpd2ph-1a.c: New test. * gcc.target/i386/avx512fp16-vcvtpd2ph-1b.c: Ditto. * gcc.target/i386/avx512fp16-vcvtph2pd-1a.c: Ditto. * gcc.target/i386/avx512fp16-vcvtph2pd-1b.c: Ditto. * gcc.target/i386/avx512fp16-vcvtph2psx-1a.c: Ditto. * gcc.target/i386/avx512fp16-vcvtph2psx-1b.c: Ditto. * gcc.target/i386/avx512fp16-vcvtps2ph-1a.c: Ditto. * gcc.target/i386/avx512fp16-vcvtps2ph-1b.c: Ditto. * gcc.target/i386/avx512fp16vl-vcvtpd2ph-1a.c: Ditto. * gcc.target/i386/avx512fp16vl-vcvtpd2ph-1b.c: Ditto. * gcc.target/i386/avx512fp16vl-vcvtph2pd-1a.c: Ditto. * gcc.target/i386/avx512fp16vl-vcvtph2pd-1b.c: Ditto. * gcc.target/i386/avx512fp16vl-vcvtph2psx-1a.c: Ditto. * gcc.target/i386/avx512fp16vl-vcvtph2psx-1b.c: Ditto. * gcc.target/i386/avx512fp16vl-vcvtps2ph-1a.c: Ditto. * gcc.target/i386/avx512fp16vl-vcvtps2ph-1b.c: Ditto. --- .../gcc.target/i386/avx512fp16-helper.h | 25 ++++-- .../gcc.target/i386/avx512fp16-vcvtpd2ph-1a.c | 24 ++++++ .../gcc.target/i386/avx512fp16-vcvtpd2ph-1b.c | 82 ++++++++++++++++++ .../gcc.target/i386/avx512fp16-vcvtph2pd-1a.c | 24 ++++++ .../gcc.target/i386/avx512fp16-vcvtph2pd-1b.c | 78 +++++++++++++++++ .../i386/avx512fp16-vcvtph2psx-1a.c | 24 ++++++ .../i386/avx512fp16-vcvtph2psx-1b.c | 81 ++++++++++++++++++ .../gcc.target/i386/avx512fp16-vcvtps2ph-1a.c | 24 ++++++ .../gcc.target/i386/avx512fp16-vcvtps2ph-1b.c | 84 +++++++++++++++++++ .../i386/avx512fp16vl-vcvtpd2ph-1a.c | 28 +++++++ .../i386/avx512fp16vl-vcvtpd2ph-1b.c | 15 ++++ .../i386/avx512fp16vl-vcvtph2pd-1a.c | 27 ++++++ .../i386/avx512fp16vl-vcvtph2pd-1b.c | 15 ++++ .../i386/avx512fp16vl-vcvtph2psx-1a.c | 27 ++++++ .../i386/avx512fp16vl-vcvtph2psx-1b.c | 15 ++++ .../i386/avx512fp16vl-vcvtps2ph-1a.c | 27 ++++++ .../i386/avx512fp16vl-vcvtps2ph-1b.c | 15 ++++ 17 files changed, 609 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtpd2ph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtpd2ph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2pd-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2pd-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2psx-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2psx-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtps2ph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vcvtps2ph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtpd2ph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtpd2ph-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtph2pd-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtph2pd-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtph2psx-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtph2psx-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtps2ph-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtps2ph-1b.c diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-helper.h b/gcc/testsuite/gcc.target/i386/avx512fp16-helper.h index cf1c536d9f7..ce3cfdc3f6b 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fp16-helper.h +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-helper.h @@ -26,23 +26,27 @@ typedef union __m512 zmm; __m512h zmmh; __m512i zmmi; + __m512d zmmd; __m256 ymm[2]; __m256h ymmh[2]; __m256i ymmi[2]; + __m256d ymmd[2]; __m128h xmmh[4]; __m128 xmm[4]; __m128i xmmi[4]; + __m128d xmmd[4]; unsigned short u16[32]; unsigned int u32[16]; int i32[16]; long long s64[8]; unsigned long long u64[8]; + double f64[8]; float f32[16]; _Float16 f16[32]; } V512; /* Global variables. */ -V512 src1, src2, src3; +V512 src1, src2, src3, src3f; int n_errs = 0; /* Helper function for packing/unpacking ph operands. */ @@ -167,12 +171,16 @@ init_src() int i; for (i = 0; i < AVX512F_MAX_ELEM; i++) { - v1.f32[i] = i + 1; - v2.f32[i] = i * 0.5f; - v3.f32[i] = i * 1.5f; - v4.f32[i] = i - 0.5f; + v1.f32[i] = i + 1; + v2.f32[i] = i * 0.5f; + v3.f32[i] = i * 1.5f; + v4.f32[i] = i - 0.5f; - src3.u32[i] = (i + 1) * 10; + src3.u32[i] = (i + 1) * 10; + } + + for (i = 0; i < 8; i++) { + src3f.f64[i] = (i + 1) * 7.5; } src1 = pack_twops_2ph(v1, v2); @@ -223,6 +231,7 @@ init_dest(V512 * res, V512 * exp) #undef HF #undef SF #undef SI +#undef DF #undef H_HF #undef NET_MASK #undef MASK_VALUE @@ -235,10 +244,12 @@ init_dest(V512 * res, V512 * exp) #define HF(x) x.ymmh[0] #define H_HF(x) x.xmmh[0] #define SF(x) x.ymm[0] +#define DF(x) x.ymmd[0] #define SI(x) x.ymmi[0] #elif AVX512F_LEN == 128 #undef HF #undef SF +#undef DF #undef SI #undef H_HF #undef NET_MASK @@ -251,6 +262,7 @@ init_dest(V512 * res, V512 * exp) #define ZMASK_VALUE 0xc1 #define HF(x) x.xmmh[0] #define SF(x) x.xmm[0] +#define DF(x) x.xmmd[0] #define SI(x) x.xmmi[0] #define H_HF(x) x.xmmh[0] #else @@ -260,6 +272,7 @@ init_dest(V512 * res, V512 * exp) #define HALF_MASK 0xcccc #define HF(x) x.zmmh #define SF(x) x.zmm +#define DF(x) x.zmmd #define SI(x) x.zmmi #define H_HF(x) x.ymmh[0] #endif diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtpd2ph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtpd2ph-1a.c new file mode 100644 index 00000000000..8f74405873f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtpd2ph-1a.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -O2" } */ +/* { dg-final { scan-assembler-times "vcvtpd2phz\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2phz\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2phz\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2ph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2ph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m128h res, res1, res2; +volatile __m512d x1, x2, x3; +volatile __mmask8 m8; + +void extern +avx512f_test (void) +{ + res = _mm512_cvtpd_ph (x1); + res1 = _mm512_mask_cvtpd_ph (res, m8, x2); + res2 = _mm512_maskz_cvtpd_ph (m8, x3); + res = _mm512_cvt_roundpd_ph (x1, 4); + res1 = _mm512_mask_cvt_roundpd_ph (res, m8, x2, 8); + res2 = _mm512_maskz_cvt_roundpd_ph (m8, x3, 11); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtpd2ph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtpd2ph-1b.c new file mode 100644 index 00000000000..dde364b65ca --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtpd2ph-1b.c @@ -0,0 +1,82 @@ +/* { dg-do run { target avx512fp16 } } */ +/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */ + + +#define AVX512FP16 +#include "avx512fp16-helper.h" + +#define N_ELEMS (AVX512F_LEN / 64) + +void NOINLINE +EMULATE(cvtpd2_ph) (V512 * dest, V512 op1, int n_el, + __mmask32 k, int zero_mask) +{ + V512 v1, v2, v3, v4, v5, v6, v7, v8; + int i; + __mmask16 m1, m2; + + m1 = k & 0xffff; + unpack_ph_2twops(*dest, &v7, &v8); + + for (i = 0; i < n_el; i++) { + if (((1 << i) & m1) == 0) { + if (zero_mask) { + v5.f32[i] = 0; + } + else { + v5.u32[i] = v7.u32[i]; + } + } + else { + v5.f32[i] = op1.f64[i]; + } + } + *dest = pack_twops_2ph(v5, v5); + for (i = n_el; i < 8; i++) + dest->u16[i] = 0; +} + +void +TEST (void) +{ + V512 res; + V512 exp; + + init_src(); + + EMULATE(cvtpd2_ph)(&exp, src3f, N_ELEMS, NET_MASK, 0); + res.xmmh[0] = INTRINSIC (_cvtpd_ph) (DF(src3f)); + CHECK_RESULT (&res, &exp, 8, _cvtpd_ph); + + init_dest(&res, &exp); + EMULATE(cvtpd2_ph)(&exp, src3f, N_ELEMS, 0xcc, 0); + res.xmmh[0] = INTRINSIC (_mask_cvtpd_ph) (res.xmmh[0], 0xcc, + DF(src3f)); + CHECK_RESULT (&res, &exp, 8, _mask_cvtpd_ph); + + EMULATE(cvtpd2_ph)(&exp, src3f, N_ELEMS, 0xf1, 1); + res.xmmh[0] = INTRINSIC (_maskz_cvtpd_ph) (0xf1, DF(src3f)); + CHECK_RESULT (&res, &exp, 8, _maskz_cvtpd_ph); + +#if AVX512F_LEN == 512 + EMULATE(cvtpd2_ph)(&exp, src3f, N_ELEMS, NET_MASK, 0); + res.xmmh[0] = INTRINSIC (_cvt_roundpd_ph) (DF(src3f), _ROUND_NINT); + CHECK_RESULT (&res, &exp, 8, _cvt_roundpd_ph); + + init_dest(&res, &exp); + EMULATE(cvtpd2_ph)(&exp, src3f, N_ELEMS, 0xcc, 0); + res.xmmh[0] = INTRINSIC (_mask_cvt_roundpd_ph) (res.xmmh[0], 0xcc, + DF(src3f), _ROUND_NINT); + CHECK_RESULT (&res, &exp, 8, _mask_cvt_roundpd_ph); + + EMULATE(cvtpd2_ph)(&exp, src3f, N_ELEMS, 0xf1, 1); + res.xmmh[0] = INTRINSIC (_maskz_cvt_roundpd_ph) (0xf1, DF(src3f), _ROUND_NINT); + CHECK_RESULT (&res, &exp, 8, _maskz_cvt_roundpd_ph); +#endif + + if (n_errs != 0) { + abort (); + } +} + + diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2pd-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2pd-1a.c new file mode 100644 index 00000000000..b7bb3b7840f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2pd-1a.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -O2" } */ +/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m512d res, res1, res2; +volatile __m128h x1, x2, x3; +volatile __mmask8 m8; + +void extern +avx512f_test (void) +{ + res = _mm512_cvtph_pd (x1); + res1 = _mm512_mask_cvtph_pd (res, m8, x2); + res2 = _mm512_maskz_cvtph_pd (m8, x3); + res = _mm512_cvt_roundph_pd (x1, 4); + res1 = _mm512_mask_cvt_roundph_pd (res, m8, x2, 8); + res2 = _mm512_maskz_cvt_roundph_pd (m8, x3, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2pd-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2pd-1b.c new file mode 100644 index 00000000000..c20888ba534 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2pd-1b.c @@ -0,0 +1,78 @@ +/* { dg-do run { target avx512fp16 } } */ +/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */ + + +#define AVX512FP16 +#include "avx512fp16-helper.h" + +#define N_ELEMS (AVX512F_LEN / 16) + +void NOINLINE +EMULATE(cvtph2_pd) (V512 * dest, V512 op1, + __mmask32 k, int zero_mask) +{ + V512 v1, v2, v3, v4, v5, v6, v7, v8; + int i; + __mmask16 m1, m2; + + m1 = k & 0xffff; + unpack_ph_2twops(op1, &v1, &v2); + + for (i = 0; i < 8; i++) { + if (((1 << i) & m1) == 0) { + if (zero_mask) { + v5.u64[i] = 0; + } + else { + v5.u64[i] = dest->u64[i]; + } + } + else { + v5.f64[i] = v1.f32[i]; + } + } + + *dest = v5; +} + +void +TEST (void) +{ + V512 res; + V512 exp; + + init_src(); + + EMULATE(cvtph2_pd)(&exp, src1, NET_MASK, 0); + DF(res) = INTRINSIC (_cvtph_pd) (src1.xmmh[0]); + CHECK_RESULT (&res, &exp, N_ELEMS, _cvtph_pd); + + init_dest(&res, &exp); + EMULATE(cvtph2_pd)(&exp, src1, 0xcc, 0); + DF(res) = INTRINSIC (_mask_cvtph_pd) (DF(res), 0xcc, src1.xmmh[0]); + CHECK_RESULT (&res, &exp, N_ELEMS, _mask_cvtph_pd); + + EMULATE(cvtph2_pd)(&exp, src1, 0xc1, 1); + DF(res) = INTRINSIC (_maskz_cvtph_pd) (0xc1, src1.xmmh[0]); + CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_cvtph_pd); + +#if AVX512F_LEN == 512 + EMULATE(cvtph2_pd)(&exp, src1, NET_MASK, 0); + DF(res) = INTRINSIC (_cvt_roundph_pd) (src1.xmmh[0], _ROUND_CUR); + CHECK_RESULT (&res, &exp, N_ELEMS, _cvt_roundph_pd); + + init_dest(&res, &exp); + EMULATE(cvtph2_pd)(&exp, src1, 0xcc, 0); + DF(res) = INTRINSIC (_mask_cvt_roundph_pd) (DF(res), 0xcc, src1.xmmh[0], _ROUND_CUR); + CHECK_RESULT (&res, &exp, N_ELEMS, _mask_cvt_roundph_pd); + + EMULATE(cvtph2_pd)(&exp, src1, 0xc1, 1); + DF(res) = INTRINSIC (_maskz_cvt_roundph_pd) (0xc1, src1.xmmh[0], _ROUND_CUR); + CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_cvt_roundph_pd); +#endif + + if (n_errs != 0) { + abort (); +} +} + diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2psx-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2psx-1a.c new file mode 100644 index 00000000000..c79549f67c5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2psx-1a.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -O2" } */ +/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m512 res, res1, res2; +volatile __m256h x1, x2, x3; +volatile __mmask16 m16; + +void extern +avx512f_test (void) +{ + res = _mm512_cvtxph_ps (x1); + res1 = _mm512_mask_cvtxph_ps (res, m16, x2); + res2 = _mm512_maskz_cvtxph_ps (m16, x3); + res = _mm512_cvtx_roundph_ps (x1, 4); + res1 = _mm512_mask_cvtx_roundph_ps (res, m16, x2, 8); + res2 = _mm512_maskz_cvtx_roundph_ps (m16, x3, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2psx-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2psx-1b.c new file mode 100644 index 00000000000..a2f20c099b5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtph2psx-1b.c @@ -0,0 +1,81 @@ +/* { dg-do run { target avx512fp16 } } */ +/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */ + + +#define AVX512FP16 +#include "avx512fp16-helper.h" + +#define N_ELEMS (AVX512F_LEN / 32) +#define CHECK_ELEMS (AVX512F_LEN / 16) + +void NOINLINE +EMULATE(cvtxph2_ps) (V512 * dest, V512 op1, int n_el, + __mmask32 k, int zero_mask) +{ + V512 v1, v2, v3, v4, v5, v6, v7, v8; + int i; + __mmask16 m1, m2; + + m1 = k & 0xffff; + unpack_ph_2twops(op1, &v1, &v2); + + for (i = 0; i < n_el; i++) { + if (((1 << i) & m1) == 0) { + if (zero_mask) { + v5.u32[i] = 0; + } + else { + v5.u32[i] = dest->u32[i]; + } + } + else { + v5.f32[i] = v1.f32[i]; + } + } + + for (i = n_el; i < 16; i++) + v5.u32[i] = 0; + + *dest = v5; +} + +void +TEST (void) +{ + V512 res; + V512 exp; + + init_src(); + + EMULATE(cvtxph2_ps)(&exp, src1, N_ELEMS, 0xffff, 0); + SF(res) = INTRINSIC (_cvtxph_ps) (H_HF(src1)); + CHECK_RESULT (&res, &exp, CHECK_ELEMS, _cvtxph_ps); + + init_dest(&res, &exp); + EMULATE(cvtxph2_ps)(&exp, src1, N_ELEMS, 0xcc, 0); + SF(res) = INTRINSIC (_mask_cvtxph_ps) (SF(res), 0xcc, H_HF(src1)); + CHECK_RESULT (&res, &exp, CHECK_ELEMS, _mask_cvtxph_ps); + + EMULATE(cvtxph2_ps)(&exp, src1, N_ELEMS, 0xc1, 1); + SF(res) = INTRINSIC (_maskz_cvtxph_ps) (0xc1, H_HF(src1)); + CHECK_RESULT (&res, &exp, CHECK_ELEMS, _maskz_cvtxph_ps); + +#if AVX512F_LEN == 512 + EMULATE(cvtxph2_ps)(&exp, src1, N_ELEMS, 0xffff, 0); + SF(res) = INTRINSIC (_cvtx_roundph_ps) (H_HF(src1), _ROUND_CUR); + CHECK_RESULT (&res, &exp, CHECK_ELEMS, _cvtx_roundph_ps); + + init_dest(&res, &exp); + EMULATE(cvtxph2_ps)(&exp, src1, N_ELEMS, 0xcc, 0); + SF(res) = INTRINSIC (_mask_cvtx_roundph_ps) (SF(res), 0xcc, H_HF(src1), _ROUND_CUR); + CHECK_RESULT (&res, &exp, CHECK_ELEMS, _mask_cvtx_roundph_ps); + + EMULATE(cvtxph2_ps)(&exp, src1, N_ELEMS, 0xc1, 1); + SF(res) = INTRINSIC (_maskz_cvtx_roundph_ps) (0xc1, H_HF(src1), _ROUND_CUR); + CHECK_RESULT (&res, &exp, CHECK_ELEMS, _maskz_cvtx_roundph_ps); +#endif + + if (n_errs != 0) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtps2ph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtps2ph-1a.c new file mode 100644 index 00000000000..cb957f86920 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtps2ph-1a.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -O2" } */ +/* { dg-final { scan-assembler-times "vcvtps2phx\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtps2phx\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2phx\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2phx\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2phx\[ \\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m256h res, res1, res2; +volatile __m512 x1, x2, x3; +volatile __mmask16 m16; + +void extern +avx512f_test (void) +{ + res = _mm512_cvtxps_ph (x1); + res1 = _mm512_mask_cvtxps_ph (res, m16, x2); + res2 = _mm512_maskz_cvtxps_ph (m16, x3); + res = _mm512_cvtx_roundps_ph (x1, 4); + res1 = _mm512_mask_cvtx_roundps_ph (res, m16, x2, 8); + res2 = _mm512_maskz_cvtx_roundps_ph (m16, x3, 11); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtps2ph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtps2ph-1b.c new file mode 100644 index 00000000000..e316e766f0a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtps2ph-1b.c @@ -0,0 +1,84 @@ +/* { dg-do run { target avx512fp16 } } */ +/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */ + + +#define AVX512FP16 +#include "avx512fp16-helper.h" + +#define N_ELEMS (AVX512F_LEN / 32) +#define CHECK_ELEMS (AVX512F_LEN_HALF / 16) + +void NOINLINE +EMULATE(cvtxps2_ph) (V512 * dest, V512 op1, int n_el, + __mmask32 k, int zero_mask) +{ + V512 v1, v2, v3, v4, v5, v6, v7, v8; + int i; + __mmask16 m1, m2; + + m1 = k & 0xffff; + + unpack_ph_2twops(*dest, &v7, &v8); + + for (i = 0; i < n_el; i++) { + if (((1 << i) & m1) == 0) { + if (zero_mask) { + v5.f32[i] = 0; + } + else { + v5.u32[i] = v7.u32[i]; + } + } + else { + v5.f32[i] = op1.f32[i]; + } + } + *dest = pack_twops_2ph(v5, v5); + for (i = n_el; i < 16; i++) + dest->u16[i] = 0; +} + +void +TEST (void) +{ + V512 res; + V512 exp; + + init_src(); + + EMULATE(cvtxps2_ph)(&exp, src3f, N_ELEMS, NET_MASK, 0); + H_HF(res) = INTRINSIC (_cvtxps_ph) (SF(src3f)); + CHECK_RESULT (&res, &exp, CHECK_ELEMS, _cvtxps_ph); + + init_dest(&res, &exp); + EMULATE(cvtxps2_ph)(&exp, src3f, N_ELEMS, 0xcc, 0); + H_HF(res) = INTRINSIC (_mask_cvtxps_ph) (H_HF(res), 0xcc, + SF(src3f)); + CHECK_RESULT (&res, &exp, CHECK_ELEMS, _mask_cvtxps_ph); + + EMULATE(cvtxps2_ph)(&exp, src3f, N_ELEMS, 0xf1, 1); + H_HF(res) = INTRINSIC (_maskz_cvtxps_ph) (0xf1, SF(src3f)); + CHECK_RESULT (&res, &exp, CHECK_ELEMS, _maskz_cvtxps_ph); + +#if AVX512F_LEN == 512 + EMULATE(cvtxps2_ph)(&exp, src3f, N_ELEMS, NET_MASK, 0); + H_HF(res) = INTRINSIC (_cvtx_roundps_ph) (SF(src3f), _ROUND_NINT); + CHECK_RESULT (&res, &exp, CHECK_ELEMS, _cvtx_roundps_ph); + + init_dest(&res, &exp); + EMULATE(cvtxps2_ph)(&exp, src3f, N_ELEMS, 0xcc, 0); + H_HF(res) = INTRINSIC (_mask_cvtx_roundps_ph) (H_HF(res), 0xcc, + SF(src3f), _ROUND_NINT); + CHECK_RESULT (&res, &exp, CHECK_ELEMS, _mask_cvtx_roundps_ph); + + EMULATE(cvtxps2_ph)(&exp, src3f, N_ELEMS, 0xf1, 1); + H_HF(res) = INTRINSIC (_maskz_cvtx_roundps_ph) (0xf1, SF(src3f), _ROUND_NINT); + CHECK_RESULT (&res, &exp, CHECK_ELEMS, _maskz_cvtx_roundps_ph); +#endif + + if (n_errs != 0) { + abort (); + } +} + + diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtpd2ph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtpd2ph-1a.c new file mode 100644 index 00000000000..57604a91334 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtpd2ph-1a.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtpd2phy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2phy\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2phy\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2phx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2phx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2phx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m128h res3; +volatile __m256d x2; +volatile __m128d x3; +volatile __mmask16 m16; +volatile __mmask8 m8; + +void extern +avx512f_test (void) +{ + res3 = _mm256_cvtpd_ph (x2); + res3 = _mm256_mask_cvtpd_ph (res3, m16, x2); + res3 = _mm256_maskz_cvtpd_ph (m16, x2); + + res3 = _mm_cvtpd_ph (x3); + res3 = _mm_mask_cvtpd_ph (res3, m8, x3); + res3 = _mm_maskz_cvtpd_ph (m8, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtpd2ph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtpd2ph-1b.c new file mode 100644 index 00000000000..ea4b200803b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtpd2ph-1b.c @@ -0,0 +1,15 @@ +/* { dg-do run { target avx512fp16 } } */ +/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */ + +#define AVX512VL +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512fp16-vcvtpd2ph-1b.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512fp16-vcvtpd2ph-1b.c" + diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtph2pd-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtph2pd-1a.c new file mode 100644 index 00000000000..80010c02297 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtph2pd-1a.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m256d res1; +volatile __m128d res2; +volatile __m128h x3; +volatile __mmask8 m8; + +void extern +avx512f_test (void) +{ + res1 = _mm256_cvtph_pd (x3); + res1 = _mm256_mask_cvtph_pd (res1, m8, x3); + res1 = _mm256_maskz_cvtph_pd (m8, x3); + + res2 = _mm_cvtph_pd (x3); + res2 = _mm_mask_cvtph_pd (res2, m8, x3); + res2 = _mm_maskz_cvtph_pd (m8, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtph2pd-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtph2pd-1b.c new file mode 100644 index 00000000000..a3849056870 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtph2pd-1b.c @@ -0,0 +1,15 @@ +/* { dg-do run { target avx512fp16 } } */ +/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */ + +#define AVX512VL +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512fp16-vcvtph2pd-1b.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512fp16-vcvtph2pd-1b.c" + diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtph2psx-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtph2psx-1a.c new file mode 100644 index 00000000000..e8c4c8c70d7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtph2psx-1a.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m256 res1; +volatile __m128 res2; +volatile __m128h x3; +volatile __mmask8 m8; + +void extern +avx512f_test (void) +{ + res1 = _mm256_cvtxph_ps (x3); + res1 = _mm256_mask_cvtxph_ps (res1, m8, x3); + res1 = _mm256_maskz_cvtxph_ps (m8, x3); + + res2 = _mm_cvtxph_ps (x3); + res2 = _mm_mask_cvtxph_ps (res2, m8, x3); + res2 = _mm_maskz_cvtxph_ps (m8, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtph2psx-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtph2psx-1b.c new file mode 100644 index 00000000000..ad91de85370 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtph2psx-1b.c @@ -0,0 +1,15 @@ +/* { dg-do run { target avx512fp16 } } */ +/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */ + +#define AVX512VL +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512fp16-vcvtph2psx-1b.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512fp16-vcvtph2psx-1b.c" + diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtps2ph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtps2ph-1a.c new file mode 100644 index 00000000000..a89f8c4fe87 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtps2ph-1a.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtps2phxy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2phxy\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2phxy\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2phxx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2phxx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2phxx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m128h res3; +volatile __m256 x2; +volatile __m128 x3; +volatile __mmask8 m8; + +void extern +avx512f_test (void) +{ + res3 = _mm256_cvtxps_ph (x2); + res3 = _mm256_mask_cvtxps_ph (res3, m8, x2); + res3 = _mm256_maskz_cvtxps_ph (m8, x2); + + res3 = _mm_cvtxps_ph (x3); + res3 = _mm_mask_cvtxps_ph (res3, m8, x3); + res3 = _mm_maskz_cvtxps_ph (m8, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtps2ph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtps2ph-1b.c new file mode 100644 index 00000000000..a339d0c933e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vcvtps2ph-1b.c @@ -0,0 +1,15 @@ +/* { dg-do run { target avx512fp16 } } */ +/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */ + +#define AVX512VL +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512fp16-vcvtps2ph-1b.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512fp16-vcvtps2ph-1b.c" +