diff mbox series

[rs6000] Fix p10 fusion regtests

Message ID 20210618181623.73926-1-acsawdey@linux.ibm.com
State New
Headers show
Series [rs6000] Fix p10 fusion regtests | expand

Commit Message

Aaron Sawdey June 18, 2021, 6:16 p.m. UTC
From: Aaron Sawdey <acsawdey@linux.vnet.ibm.com>

Update the count of matches for the fusion combine patterns after
the recent changes to them.  At Segher's request, used \m and \M
in the match patterns. Also I have grouped together all alternatives of
each fusion insn, which should hopefully make this test a little less
fragile.

OK for trunk and backport to 11?

Thanks!
   Aaron

gcc/testsuite/ChangeLog

	* gcc.target/powerpc/fusion-p10-2logical.c: Update pattern
	match counts.
	* gcc.target/powerpc/fusion-p10-addadd.c: Update pattern match
	counts.
	* gcc.target/powerpc/fusion-p10-ldcmpi.c: Update pattern match
	counts.
	* gcc.target/powerpc/fusion-p10-logadd.c: Update pattern match
	counts.
---
 .../gcc.target/powerpc/fusion-p10-2logical.c       | 401 ++++++++-------------
 .../gcc.target/powerpc/fusion-p10-addadd.c         |  17 +-
 .../gcc.target/powerpc/fusion-p10-ldcmpi.c         |  10 +-
 .../gcc.target/powerpc/fusion-p10-logadd.c         | 129 ++-----
 4 files changed, 194 insertions(+), 363 deletions(-)

Comments

Segher Boessenkool June 18, 2021, 8:46 p.m. UTC | #1
Hi!

On Fri, Jun 18, 2021 at 01:16:23PM -0500, Aaron Sawdey wrote:
> Update the count of matches for the fusion combine patterns after
> the recent changes to them.  At Segher's request, used \m and \M
> in the match patterns. Also I have grouped together all alternatives of
> each fusion insn, which should hopefully make this test a little less
> fragile.

> 	* gcc.target/powerpc/fusion-p10-2logical.c: Update pattern
> 	match counts.
> 	* gcc.target/powerpc/fusion-p10-addadd.c: Update pattern match
> 	counts.
> 	* gcc.target/powerpc/fusion-p10-ldcmpi.c: Update pattern match
> 	counts.
> 	* gcc.target/powerpc/fusion-p10-logadd.c: Update pattern match
> 	counts.

All of these fit on one line, fwiw.

>  /* Recreate with:
> -   grep ' \*fuse_' fusion-p10-2logical.s|sed -e 's,^.*\*,,' |sort -k 7,7 |uniq -c|awk '{l=30-length($2); printf("/%s* { %s { scan-assembler-times \"%s\"%-*s        %4d { target lp64 } } } *%s/\n","","dg-final",$2,l,"",$1,"");}'
> +   grep ' \*fuse_' fusion-p10-2logical.s|sed -e 's,^.*\*,,' -e 's,/[0-9],/,' |sort -k 7,7 |uniq -c|awk '{l=30-length($2); printf("/%s* { %s { scan-assembler-times {\\m%s\\M}%-*s        %4d { target lp64 } } } *%s/\n","","dg-final",$2,l,"",$1,"");}'
>   */

Let me see if I can understand that :-)

... well enough.  Okay.  Maybe rewrite this as a Perl script before you
reach a line length of 250 chars?  :-)  (But only if you need any
significant changes here again of course.)

> +/* { dg-final { scan-assembler-times {\mfuse_xor_or\M/}                            32 { target lp64 } } } */
> +/* { dg-final { scan-assembler-times {\mfuse_xor_orc\M/}                           32 { target lp64 } } } */

\M matters for things like this (or the former would match everything
the latter does as well).  You didn't have that problem when your REs
didn't end in text, of course.  \m isn't so important here of course,
but it is easier to just add it than to reason about if you need it.

I take it you have checked that the new counts are correct and/or
expected.

This is okay for trunk, and for 11 too once it has shown reasonable
results for all configs these tests failed on before.  Thanks!


Segher
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/powerpc/fusion-p10-2logical.c b/gcc/testsuite/gcc.target/powerpc/fusion-p10-2logical.c
index de22176..009a5f2 100644
--- a/gcc/testsuite/gcc.target/powerpc/fusion-p10-2logical.c
+++ b/gcc/testsuite/gcc.target/powerpc/fusion-p10-2logical.c
@@ -64,262 +64,151 @@  TEST(vboolchar_t);
 TEST(vuint_t);
 
 /* Recreate with:
-   grep ' \*fuse_' fusion-p10-2logical.s|sed -e 's,^.*\*,,' |sort -k 7,7 |uniq -c|awk '{l=30-length($2); printf("/%s* { %s { scan-assembler-times \"%s\"%-*s        %4d { target lp64 } } } *%s/\n","","dg-final",$2,l,"",$1,"");}'
+   grep ' \*fuse_' fusion-p10-2logical.s|sed -e 's,^.*\*,,' -e 's,/[0-9],/,' |sort -k 7,7 |uniq -c|awk '{l=30-length($2); printf("/%s* { %s { scan-assembler-times {\\m%s\\M}%-*s        %4d { target lp64 } } } *%s/\n","","dg-final",$2,l,"",$1,"");}'
  */
-  
-/* { dg-final { scan-assembler-times "fuse_and_and/1"                          16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_and/2"                          16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_and/0"                         16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_and/1"                         26 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_and/2"                         48 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_and/3"                          6 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_or/0"                          16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_or/1"                          16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_or/2"                          32 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_orc/0"                          8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_orc/1"                          8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_orc/2"                         48 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_xor/0"                         16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_xor/1"                         16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_xor/2"                         32 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_eqv/0"                           8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_eqv/2"                          24 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_or/0"                           16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_or/2"                           16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_orc/0"                           8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_orc/2"                          24 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_xor/0"                          16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_xor/2"                          16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_eqv_and/0"                          16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_eqv_and/2"                          16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_eqv_andc/0"                          8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_eqv_andc/2"                         24 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_eqv_or/0"                            8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_eqv_or/2"                           24 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_and/0"                         16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_and/2"                         16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_andc/0"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_andc/2"                        24 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_or/0"                          14 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_or/1"                           2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_or/2"                          72 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_or/3"                           8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_orc/2"                         24 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_orc/3"                          8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_and/0"                          28 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_and/1"                           4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_and/2"                          48 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_and/3"                          16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_andc/2"                         24 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_andc/3"                          8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_or/0"                            8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_or/2"                           24 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_orc/0"                           8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_orc/2"                          24 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_and/0"                           16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_and/2"                           16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_andc/0"                          16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_andc/2"                          16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_and/0"                          16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_and/1"                          16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_and/2"                          32 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_andc/0"                          8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_andc/1"                          8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_andc/2"                         48 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_or/0"                            8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_or/1"                           10 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_or/2"                           72 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_or/3"                            6 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_xor/0"                           8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_xor/1"                           8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_xor/2"                          48 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_eqv/0"                            8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_eqv/2"                           24 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_or/1"                            16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_or/2"                            16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_xor/0"                           16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_xor/2"                           16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vandc_vand/0"                        8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vandc_vand/1"                       10 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vandc_vand/3"                        6 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vandc_vor/0"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vandc_vor/1"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vandc_vorc/0"                        8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vandc_vorc/1"                        8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vandc_vxor/0"                        8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vandc_vxor/1"                        8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vand_vand/1"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vand_veqv/0"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vand_vor/0"                          8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vand_vorc/0"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vand_vxor/0"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_veqv_vand/0"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_veqv_vandc/0"                        8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_veqv_vor/0"                          8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnand_vand/0"                        8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnand_vandc/0"                       8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnand_vor/0"                        14 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnand_vor/1"                         2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnand_vor/3"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnand_vorc/3"                        8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnor_vand/0"                        14 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnor_vand/1"                         2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnor_vand/3"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnor_vandc/3"                        8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnor_vor/0"                          8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnor_vorc/0"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vorc_vand/0"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vorc_vand/1"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vorc_vandc/0"                        8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vorc_vandc/1"                        8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vorc_vor/0"                          8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vorc_vor/1"                         10 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vorc_vor/3"                          6 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vorc_vxor/0"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vorc_vxor/1"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vor_vand/0"                          8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vor_vandc/0"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vor_veqv/0"                          8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vor_vor/1"                           8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vor_vxor/0"                          8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vxor_vand/0"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vxor_vandc/0"                        8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vxor_veqv/3"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vxor_vnand/0"                        8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vxor_vor/0"                          8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vxor_vorc/0"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vxor_vxor/1"                         8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_and/0"                          16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_and/2"                          16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_andc/0"                         16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_andc/2"                         16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_eqv/2"                          24 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_eqv/3"                           8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_nand/0"                          8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_nand/2"                         24 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_or/0"                           16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_or/2"                           16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_orc/0"                           8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_orc/2"                          24 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_xor/1"                          16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_xor/2"                          16 { target lp64 } } } */
 
-/* { dg-final { scan-assembler-times "fuse_and_and/1"                          40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_and/0"                         40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_and/1"                         56 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_and/3"                         24 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_or/0"                          40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_or/1"                          40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_orc/0"                         32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_orc/1"                         32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_orc/2"                         16 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_xor/0"                         40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_andc_xor/1"                         40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_eqv/0"                          32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_eqv/2"                           8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_or/0"                           40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_orc/0"                          32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_orc/2"                           8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_xor/0"                          40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_eqv_and/0"                          40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_eqv_andc/0"                         32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_eqv_andc/2"                          8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_eqv_or/0"                           32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_eqv_or/2"                            8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_and/0"                         40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_andc/0"                        32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_andc/2"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_or/0"                          56 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_or/1"                           8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_or/2"                          24 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_or/3"                          32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_orc/2"                          8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_orc/3"                         32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_and/0"                          70 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_and/1"                          10 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_and/3"                          40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_andc/2"                          8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_andc/3"                         32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_or/0"                           32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_or/2"                            8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_orc/0"                          32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_orc/2"                           8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_and/0"                           40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_andc/0"                          40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_and/0"                          40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_and/1"                          40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_andc/0"                         32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_andc/1"                         32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_andc/2"                         16 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_or/0"                           32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_or/1"                           40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_or/2"                           24 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_or/3"                           24 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_xor/0"                          32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_xor/1"                          32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_orc_xor/2"                          16 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_eqv/0"                           32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_eqv/2"                            8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_or/1"                            40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_xor/0"                           40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vandc_vand/0"                        8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vandc_vand/1"                       10 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vandc_vand/3"                        6 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vandc_vor/0"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vandc_vor/1"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vandc_vorc/0"                        8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vandc_vorc/1"                        8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vandc_vxor/0"                        8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vandc_vxor/1"                        8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vand_vand/1"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vand_veqv/0"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vand_vor/0"                          8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vand_vorc/0"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vand_vxor/0"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_veqv_vand/0"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_veqv_vandc/0"                        8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_veqv_vor/0"                          8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnand_vand/0"                        8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnand_vandc/0"                       8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnand_vor/0"                        14 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnand_vor/1"                         2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnand_vor/3"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnand_vorc/3"                        8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnor_vand/0"                        14 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnor_vand/1"                         2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnor_vand/3"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnor_vandc/3"                        8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnor_vor/0"                          8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vnor_vorc/0"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vorc_vand/0"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vorc_vand/1"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vorc_vandc/0"                        8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vorc_vandc/1"                        8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vorc_vor/0"                          8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vorc_vor/1"                         10 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vorc_vor/3"                          6 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vorc_vxor/0"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vorc_vxor/1"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vor_vand/0"                          8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vor_vandc/0"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vor_veqv/0"                          8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vor_vor/1"                           8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vor_vxor/0"                          8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vxor_vand/0"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vxor_vandc/0"                        8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vxor_veqv/3"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vxor_vnand/0"                        8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vxor_vor/0"                          8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vxor_vorc/0"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vxor_vxor/1"                         8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_and/0"                          40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_andc/0"                         40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_eqv/2"                           8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_eqv/3"                          32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_nand/0"                         32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_nand/2"                          8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_or/0"                           40 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_orc/0"                          32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_orc/2"                           8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_xor_xor/1"                          40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_and_and\M/}                           32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_andc_and\M/}                          96 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_andc_or\M/}                           64 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_andc_orc\M/}                          64 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_andc_xor\M/}                          64 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_and_eqv\M/}                           32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_and_or\M/}                            32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_and_orc\M/}                           32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_and_xor\M/}                           32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_eqv_and\M/}                           32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_eqv_andc\M/}                          32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_eqv_or\M/}                            32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nand_and\M/}                          32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nand_andc\M/}                         32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nand_or\M/}                           96 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nand_orc\M/}                          32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nor_and\M/}                           96 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nor_andc\M/}                          32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nor_or\M/}                            32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nor_orc\M/}                           32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_or_and\M/}                            32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_or_andc\M/}                           32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_orc_and\M/}                           64 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_orc_andc\M/}                          64 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_orc_or\M/}                            96 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_orc_xor\M/}                           64 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_or_eqv\M/}                            32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_or_or\M/}                             32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_or_xor\M/}                            32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vandc_vand\M/}                        24 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vandc_vor\M/}                         16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vandc_vorc\M/}                        16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vandc_vxor\M/}                        16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vand_vand\M/}                          8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vand_veqv\M/}                          8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vand_vor\M/}                           8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vand_vorc\M/}                          8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vand_vxor\M/}                          8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_veqv_vand\M/}                          8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_veqv_vandc\M/}                         8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_veqv_vor\M/}                           8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vnand_vand\M/}                         8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vnand_vandc\M/}                        8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vnand_vor\M/}                         24 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vnand_vorc\M/}                         8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vnor_vand\M/}                         24 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vnor_vandc\M/}                         8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vnor_vor\M/}                           8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vnor_vorc\M/}                          8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vorc_vand\M/}                         16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vorc_vandc\M/}                        16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vorc_vor\M/}                          24 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vorc_vxor\M/}                         16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vor_vand\M/}                           8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vor_vandc\M/}                          8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vor_veqv\M/}                           8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vor_vor\M/}                            8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vor_vxor\M/}                           8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vxor_vand\M/}                          8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vxor_vandc\M/}                         8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vxor_veqv\M/}                          8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vxor_vnand\M/}                         8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vxor_vor\M/}                           8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vxor_vorc\M/}                          8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vxor_vxor\M/}                          8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_xor_and\M/}                           32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_xor_andc\M/}                          32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_xor_eqv\M/}                           32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_xor_nand\M/}                          32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_xor_or\M/}                            32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_xor_orc\M/}                           32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_xor_xor\M/}                           32 { target lp64 } } } */
 
+/* { dg-final { scan-assembler-times {\mfuse_and_and\M/}                           40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_andc_and\M/}                         120 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_andc_or\M/}                           80 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_andc_orc\M/}                          80 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_andc_xor\M/}                          80 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_and_eqv\M/}                           40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_and_or\M/}                            40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_and_orc\M/}                           40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_and_xor\M/}                           40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_eqv_and\M/}                           40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_eqv_andc\M/}                          40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_eqv_or\M/}                            40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nand_and\M/}                          40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nand_andc\M/}                         40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nand_or\M/}                          120 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nand_orc\M/}                          40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nor_and\M/}                          120 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nor_andc\M/}                          40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nor_or\M/}                            40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nor_orc\M/}                           40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_or_and\M/}                            40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_or_andc\M/}                           40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_orc_and\M/}                           80 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_orc_andc\M/}                          80 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_orc_or\M/}                           120 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_orc_xor\M/}                           80 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_or_eqv\M/}                            40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_or_or\M/}                             40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_or_xor\M/}                            40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vandc_vand\M/}                        24 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vandc_vor\M/}                         16 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vandc_vorc\M/}                        16 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vandc_vxor\M/}                        16 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vand_vand\M/}                          8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vand_veqv\M/}                          8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vand_vor\M/}                           8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vand_vorc\M/}                          8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vand_vxor\M/}                          8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_veqv_vand\M/}                          8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_veqv_vandc\M/}                         8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_veqv_vor\M/}                           8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vnand_vand\M/}                         8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vnand_vandc\M/}                        8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vnand_vor\M/}                         24 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vnand_vorc\M/}                         8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vnor_vand\M/}                         24 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vnor_vandc\M/}                         8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vnor_vor\M/}                           8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vnor_vorc\M/}                          8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vorc_vand\M/}                         16 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vorc_vandc\M/}                        16 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vorc_vor\M/}                          24 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vorc_vxor\M/}                         16 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vor_vand\M/}                           8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vor_vandc\M/}                          8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vor_veqv\M/}                           8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vor_vor\M/}                            8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vor_vxor\M/}                           8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vxor_vand\M/}                          8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vxor_vandc\M/}                         8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vxor_veqv\M/}                          8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vxor_vnand\M/}                         8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vxor_vor\M/}                           8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vxor_vorc\M/}                          8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vxor_vxor\M/}                          8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_xor_and\M/}                           40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_xor_andc\M/}                          40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_xor_eqv\M/}                           40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_xor_nand\M/}                          40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_xor_or\M/}                            40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_xor_orc\M/}                           40 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_xor_xor\M/}                           40 { target ilp32 } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fusion-p10-addadd.c b/gcc/testsuite/gcc.target/powerpc/fusion-p10-addadd.c
index f70b56a..68886b9 100644
--- a/gcc/testsuite/gcc.target/powerpc/fusion-p10-addadd.c
+++ b/gcc/testsuite/gcc.target/powerpc/fusion-p10-addadd.c
@@ -32,16 +32,7 @@  vlong vaddadd2(vlong s, vlong a, vlong b, vlong c)
   return a+b+c;
 }
 
-/* { dg-final { scan-assembler-times "fuse_add_add/0"                1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_add/1"                1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_add/2"                1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vaddudm_vaddudm/0"        1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vaddudm_vaddudm/1"        1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_vaddudm_vaddudm/2"        1 { target lp64 } } } */
-
-/* { dg-final { scan-assembler-times "fuse_add_add/0"                1 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_add/1"                1 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_add/2"                1 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vaddudm_vaddudm/0"        0 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vaddudm_vaddudm/1"        0 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_vaddudm_vaddudm/2"        0 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_add_add\M/}                3 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vaddudm_vaddudm\M/}        3 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_add_add\M/}                3 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_vaddudm_vaddudm\M/}        0 { target ilp32 } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
index ea1d5d0..526a026 100644
--- a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
+++ b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
@@ -53,16 +53,16 @@  TEST(int16_t)
 TEST(uint8_t)
 TEST(int8_t)
 
-/* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero"   2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero"   4 { target lp64 } } } */
 /* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_DI_CC_none"             4 { target lp64 } } } */
 /* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_clobber_CC_none"        4 { target lp64 } } } */
 /* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_DI_CCUNS_none"         1 { target lp64 } } } */
 /* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none"    1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign"       8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero"   2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign"         3 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign"      16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero"   4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign"         0 { target lp64 } } } */
 /* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none"       4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero"     2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero"     0 { target lp64 } } } */
 /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none"   2 { target lp64 } } } */
 
 /* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero"   2 { target ilp32 } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fusion-p10-logadd.c b/gcc/testsuite/gcc.target/powerpc/fusion-p10-logadd.c
index 21d7f40..b2fefe9 100644
--- a/gcc/testsuite/gcc.target/powerpc/fusion-p10-logadd.c
+++ b/gcc/testsuite/gcc.target/powerpc/fusion-p10-logadd.c
@@ -49,94 +49,45 @@  TEST(uint32_t);
 TEST(int32_t);
 TEST(uint64_t);
 TEST(int64_t);
-  
-/* { dg-final { scan-assembler-times "fuse_nand_rsubf/0"   2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_rsubf/2"   2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_rsubf/0"    2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_rsubf/2"    2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_nand/0"     4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_nor/0"      4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_or/0"       4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_rsubf/0"    4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_subf/0"     4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_add/0"     4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_subf/0"    4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_add/0"      4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_subf/0"     4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_rsubf/0"     4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_subf/0"      4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_nand/0"    4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_nand/1"    4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_nor/0"     4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_nor/1"     4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_or/0"      4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_or/1"      4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_add/0"      6 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_add/0"       6 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_and/0"      8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_and/2"      8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_and/0"     8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_and/1"     8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_nand/2"    12 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_nor/2"     12 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_or/2"      12 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_rsubf/2"   12 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_subf/2"    12 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_add/2"    12 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_subf/2"   12 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_add/2"     12 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_subf/2"    12 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_rsubf/2"    12 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_subf/2"     12 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_and/2"    16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_add/2"     22 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_add/2"      22 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_nand/2"   24 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_nor/2"    24 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_or/2"     24 { target lp64 } } } */
 
-/* { dg-final { scan-assembler-times "fuse_nand_rsubf/0"   2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_rsubf/2"   0 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_rsubf/0"    2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_rsubf/2"    0 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_nand/0"     4 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_nor/0"      4 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_or/0"       4 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_rsubf/0"    4 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_subf/0"     4 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_add/0"     4 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_subf/0"    4 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_add/0"      4 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_subf/0"     4 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_rsubf/0"     4 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_subf/0"      4 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_nand/0"    4 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_nand/1"    4 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_nor/0"     4 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_nor/1"     4 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_or/0"      4 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_or/1"      4 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_add/0"      6 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_add/0"       6 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_and/0"      8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_and/2"      4 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_and/0"     8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_and/1"     8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_nand/2"     8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_nor/2"      8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_add_or/2"       8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_rsubf/2"    8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_subf/2"     8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_add/2"     8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nand_subf/2"    8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_add/2"      8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_nor_subf/2"     8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_rsubf/2"     8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_subf/2"      8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_and/2"     8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_and_add/2"     16 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_or_add/2"      16 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_nand/2"   16 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_nor/2"    16 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "fuse_subf_or/2"     16 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_add_and\M/}                           16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_add_nand\M/}                          16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_add_nor\M/}                           16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_add_or\M/}                            16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_and_add\M/}                           28 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_and_rsubf\M/}                         16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_and_subf\M/}                          16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nand_add\M/}                          16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nand_rsubf\M/}                         4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nand_subf\M/}                         16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nor_add\M/}                           16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nor_rsubf\M/}                          4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nor_subf\M/}                          16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_or_add\M/}                            28 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_or_rsubf\M/}                          16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_or_subf\M/}                           16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_subf_and\M/}                          32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_subf_nand\M/}                         32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_subf_nor\M/}                          32 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_subf_or\M/}                           32 { target lp64 } } } */
 
+/* { dg-final { scan-assembler-times {\mfuse_add_and\M/}                           12 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_add_nand\M/}                          12 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_add_nor\M/}                           12 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_add_or\M/}                            12 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_and_add\M/}                           22 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_and_rsubf\M/}                         12 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_and_subf\M/}                          12 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nand_add\M/}                          12 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nand_rsubf\M/}                         2 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nand_subf\M/}                         12 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nor_add\M/}                           12 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nor_rsubf\M/}                          2 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_nor_subf\M/}                          12 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_or_add\M/}                            22 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_or_rsubf\M/}                          12 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_or_subf\M/}                           12 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_subf_and\M/}                          24 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_subf_nand\M/}                         24 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_subf_nor\M/}                          24 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfuse_subf_or\M/}                           24 { target ilp32 } } } */