| Message ID | 20200512235314.8586-1-jimw@sifive.com |
|---|---|
| State | New |
| Headers | show |
| Series | RISC-V: Make unique SECCAT_SRODATA names start with .srodata | expand |
On Tue, 12 May 2020 16:53:14 PDT (-0700), Jim Wilson wrote: > This fixes a bug reported to the RISC-V sw-dev mailing list late last year. > https://groups.google.com/a/groups.riscv.org/forum/#!topic/sw-dev/JV5Jdh4UjVw > > Keith Packard wote the obvious patch to fix it. I tested it with cross builds > for riscv32-newlib and riscv64-linux. There were no regressions. Checking > toolchain libraries with objdump shows that there are no longer sdata2 sections > in the libraries. > > Committed. Thanks! > > Jim > > 2020-05-12 Keith Packard <keith.packard@sifive.com> > * config/riscv/riscv.c (riscv_unique_section): New. > (TARGET_ASM_UNIQUE_SECTION): New. > > default_unique_section uses ".sdata2" as a prefix for SECCAT_SRODATA > unique sections, but RISC-V uses ".srodata" instead. Override the > TARGET_ASM_UNIQUE_SECTION function to catch this case, allowing the > default to be used for all other sections. > > Signed-off-by: Keith Packard <keithp@keithp.com> > --- > gcc/config/riscv/riscv.c | 40 ++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 40 insertions(+) > > diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c > index e4c08d780db..1ad9799fce4 100644 > --- a/gcc/config/riscv/riscv.c > +++ b/gcc/config/riscv/riscv.c > @@ -3492,6 +3492,43 @@ riscv_select_section (tree decl, int reloc, > } > } > > +/* Switch to the appropriate section for output of DECL. */ > + > +static void > +riscv_unique_section (tree decl, int reloc) > +{ > + const char *prefix = NULL; > + bool one_only = DECL_ONE_ONLY (decl) && !HAVE_COMDAT_GROUP; > + > + switch (categorize_decl_for_section (decl, reloc)) > + { > + case SECCAT_SRODATA: > + prefix = one_only ? ".sr" : ".srodata"; > + break; > + > + default: > + break; > + } > + if (prefix) > + { > + const char *name, *linkonce; > + char *string; > + > + name = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl)); > + name = targetm.strip_name_encoding (name); > + > + /* If we're using one_only, then there needs to be a .gnu.linkonce > + prefix to the section name. */ > + linkonce = one_only ? ".gnu.linkonce" : ""; > + > + string = ACONCAT ((linkonce, prefix, ".", name, NULL)); > + > + set_decl_section_name (decl, string); > + return; > + } > + default_unique_section (decl, reloc); > +} > + > /* Return a section for X, handling small data. */ > > static section * > @@ -5254,6 +5291,9 @@ riscv_new_address_profitable_p (rtx memref, rtx_insn *insn, rtx new_addr) > #undef TARGET_ASM_SELECT_SECTION > #define TARGET_ASM_SELECT_SECTION riscv_select_section > > +#undef TARGET_ASM_UNIQUE_SECTION > +#define TARGET_ASM_UNIQUE_SECTION riscv_unique_section > + > #undef TARGET_ASM_SELECT_RTX_SECTION > #define TARGET_ASM_SELECT_RTX_SECTION riscv_elf_select_rtx_section
diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c index e4c08d780db..1ad9799fce4 100644 --- a/gcc/config/riscv/riscv.c +++ b/gcc/config/riscv/riscv.c @@ -3492,6 +3492,43 @@ riscv_select_section (tree decl, int reloc, } } +/* Switch to the appropriate section for output of DECL. */ + +static void +riscv_unique_section (tree decl, int reloc) +{ + const char *prefix = NULL; + bool one_only = DECL_ONE_ONLY (decl) && !HAVE_COMDAT_GROUP; + + switch (categorize_decl_for_section (decl, reloc)) + { + case SECCAT_SRODATA: + prefix = one_only ? ".sr" : ".srodata"; + break; + + default: + break; + } + if (prefix) + { + const char *name, *linkonce; + char *string; + + name = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl)); + name = targetm.strip_name_encoding (name); + + /* If we're using one_only, then there needs to be a .gnu.linkonce + prefix to the section name. */ + linkonce = one_only ? ".gnu.linkonce" : ""; + + string = ACONCAT ((linkonce, prefix, ".", name, NULL)); + + set_decl_section_name (decl, string); + return; + } + default_unique_section (decl, reloc); +} + /* Return a section for X, handling small data. */ static section * @@ -5254,6 +5291,9 @@ riscv_new_address_profitable_p (rtx memref, rtx_insn *insn, rtx new_addr) #undef TARGET_ASM_SELECT_SECTION #define TARGET_ASM_SELECT_SECTION riscv_select_section +#undef TARGET_ASM_UNIQUE_SECTION +#define TARGET_ASM_UNIQUE_SECTION riscv_unique_section + #undef TARGET_ASM_SELECT_RTX_SECTION #define TARGET_ASM_SELECT_RTX_SECTION riscv_elf_select_rtx_section
This fixes a bug reported to the RISC-V sw-dev mailing list late last year. https://groups.google.com/a/groups.riscv.org/forum/#!topic/sw-dev/JV5Jdh4UjVw Keith Packard wote the obvious patch to fix it. I tested it with cross builds for riscv32-newlib and riscv64-linux. There were no regressions. Checking toolchain libraries with objdump shows that there are no longer sdata2 sections in the libraries. Committed. Jim 2020-05-12 Keith Packard <keith.packard@sifive.com> * config/riscv/riscv.c (riscv_unique_section): New. (TARGET_ASM_UNIQUE_SECTION): New. default_unique_section uses ".sdata2" as a prefix for SECCAT_SRODATA unique sections, but RISC-V uses ".srodata" instead. Override the TARGET_ASM_UNIQUE_SECTION function to catch this case, allowing the default to be used for all other sections. Signed-off-by: Keith Packard <keithp@keithp.com> --- gcc/config/riscv/riscv.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)