@@ -1,4 +1,4 @@
-7915b6a399fbb6d9c0db351eb5a8fda7e43fe8c5
+6c45dd3a6523a21887cb9a883eeb3abd40375dc1
The first line of this file holds the git revision number of the last
merge done from the dlang/druntime repository.
@@ -510,7 +510,7 @@ void getcacheinfoCPUID2()
uint numinfos = 1;
do {
version (GNU) asm pure nothrow @nogc {
- "cpuid" : "=a" a[0], "=b" a[1], "=c" a[2], "=d" a[3] : "a" 2;
+ "cpuid" : "=a" (a[0]), "=b" (a[1]), "=c" (a[2]), "=d" (a[3]) : "a" (2);
} else asm pure nothrow @nogc {
mov EAX, 2;
cpuid;
@@ -554,7 +554,7 @@ void getcacheinfoCPUID4()
for (;;) {
uint a, b, number_of_sets;
version (GNU) asm pure nothrow @nogc {
- "cpuid" : "=a" a, "=b" b, "=c" number_of_sets : "a" 4, "c" cachenum : "edx";
+ "cpuid" : "=a" (a), "=b" (b), "=c" (number_of_sets) : "a" (4), "c" (cachenum) : "edx";
} else asm pure nothrow @nogc {
mov EAX, 4;
mov ECX, cachenum;
@@ -594,7 +594,7 @@ void getAMDcacheinfo()
{
uint dummy, c5, c6, d6;
version (GNU) asm pure nothrow @nogc {
- "cpuid" : "=a" dummy, "=c" c5 : "a" 0x8000_0005 : "ebx", "edx";
+ "cpuid" : "=a" (dummy), "=c" (c5) : "a" (0x8000_0005) : "ebx", "edx";
} else asm pure nothrow @nogc {
mov EAX, 0x8000_0005; // L1 cache
cpuid;
@@ -613,7 +613,7 @@ void getAMDcacheinfo()
ubyte numcores = 1;
if (max_extended_cpuid >= 0x8000_0008) {
version (GNU) asm pure nothrow @nogc {
- "cpuid" : "=a" dummy, "=c" numcores : "a" 0x8000_0008 : "ebx", "edx";
+ "cpuid" : "=a" (dummy), "=c" (numcores) : "a" (0x8000_0008) : "ebx", "edx";
} else asm pure nothrow @nogc {
mov EAX, 0x8000_0008;
cpuid;
@@ -624,7 +624,7 @@ void getAMDcacheinfo()
}
version (GNU) asm pure nothrow @nogc {
- "cpuid" : "=a" dummy, "=c" c6, "=d" d6 : "a" 0x8000_0006 : "ebx";
+ "cpuid" : "=a" (dummy), "=c" (c6), "=d" (d6) : "a" (0x8000_0006) : "ebx";
} else asm pure nothrow @nogc {
mov EAX, 0x8000_0006; // L2/L3 cache
cpuid;
@@ -653,7 +653,7 @@ void getCpuInfo0B()
uint a, b, c, d;
do {
version (GNU) asm pure nothrow @nogc {
- "cpuid" : "=a" a, "=b" b, "=c" c, "=d" d : "a" 0x0B, "c" level;
+ "cpuid" : "=a" (a), "=b" (b), "=c" (c), "=d" (d) : "a" (0x0B), "c" (level);
} else asm pure nothrow @nogc {
mov EAX, 0x0B;
mov ECX, level;
@@ -686,8 +686,10 @@ void cpuidX86()
uint* venptr = cast(uint*)cf.vendorID.ptr;
version (GNU)
{
- asm pure nothrow @nogc { "cpuid" : "=a" max_cpuid, "=b" venptr[0], "=d" venptr[1], "=c" venptr[2] : "a" 0; }
- asm pure nothrow @nogc { "cpuid" : "=a" max_extended_cpuid : "a" 0x8000_0000 : "ebx", "ecx", "edx"; }
+ asm pure nothrow @nogc {
+ "cpuid" : "=a" (max_cpuid), "=b" (venptr[0]), "=d" (venptr[1]), "=c" (venptr[2]) : "a" (0);
+ "cpuid" : "=a" (max_extended_cpuid) : "a" (0x8000_0000) : "ebx", "ecx", "edx";
+ }
}
else
{
@@ -730,7 +732,7 @@ void cpuidX86()
cf.probablyAMD = cf.vendorID == "AuthenticAMD";
uint apic = 0; // brand index, apic id
version (GNU) asm pure nothrow @nogc {
- "cpuid" : "=a" a, "=b" apic, "=c" cf.miscfeatures, "=d" cf.features : "a" 1;
+ "cpuid" : "=a" (a), "=b" (apic), "=c" (cf.miscfeatures), "=d" (cf.features) : "a" (1);
} else {
asm pure nothrow @nogc {
mov EAX, 1; // model, stepping
@@ -753,7 +755,7 @@ void cpuidX86()
if (max_cpuid >= 7)
{
version (GNU) asm pure nothrow @nogc {
- "cpuid" : "=a" a, "=b" cf.extfeatures, "=c" c : "a" 7, "c" 0 : "edx";
+ "cpuid" : "=a" (a), "=b" (cf.extfeatures), "=c" (c) : "a" (7), "c" (0) : "edx";
} else {
uint ext;
asm pure nothrow @nogc {
@@ -769,7 +771,7 @@ void cpuidX86()
if (cf.miscfeatures & OSXSAVE_BIT)
{
version (GNU) asm pure nothrow @nogc {
- "xgetbv" : "=a" a, "=d" d : "c" 0;
+ "xgetbv" : "=a" (a), "=d" (d) : "c" (0);
} else asm pure nothrow @nogc {
mov ECX, 0;
xgetbv;
@@ -783,7 +785,7 @@ void cpuidX86()
cf.amdmiscfeatures = 0;
if (max_extended_cpuid >= 0x8000_0001) {
version (GNU) asm pure nothrow @nogc {
- "cpuid" : "=a" a, "=c" cf.amdmiscfeatures, "=d" cf.amdfeatures : "a" 0x8000_0001 : "ebx";
+ "cpuid" : "=a" (a), "=c" (cf.amdmiscfeatures), "=d" (cf.amdfeatures) : "a" (0x8000_0001) : "ebx";
} else {
asm pure nothrow @nogc {
mov EAX, 0x8000_0001;
@@ -804,7 +806,7 @@ void cpuidX86()
if (hyperThreadingBit) {
// determine max number of cores for AMD
version (GNU) asm pure nothrow @nogc {
- "cpuid" : "=a" a, "=c" c : "a" 0x8000_0008 : "ebx", "edx";
+ "cpuid" : "=a" (a), "=c" (c) : "a" (0x8000_0008) : "ebx", "edx";
} else asm pure nothrow @nogc {
mov EAX, 0x8000_0008;
cpuid;
@@ -818,9 +820,11 @@ void cpuidX86()
uint* pnb = cast(uint*)cf.processorNameBuffer.ptr;
version (GNU)
{
- asm pure nothrow @nogc { "cpuid" : "=a" pnb[0], "=b" pnb[1], "=c" pnb[ 2], "=d" pnb[ 3] : "a" 0x8000_0002; }
- asm pure nothrow @nogc { "cpuid" : "=a" pnb[4], "=b" pnb[5], "=c" pnb[ 6], "=d" pnb[ 7] : "a" 0x8000_0003; }
- asm pure nothrow @nogc { "cpuid" : "=a" pnb[8], "=b" pnb[9], "=c" pnb[10], "=d" pnb[11] : "a" 0x8000_0004; }
+ asm pure nothrow @nogc {
+ "cpuid" : "=a" (pnb[0]), "=b" (pnb[1]), "=c" (pnb[ 2]), "=d" (pnb[ 3]) : "a" (0x8000_0002);
+ "cpuid" : "=a" (pnb[4]), "=b" (pnb[5]), "=c" (pnb[ 6]), "=d" (pnb[ 7]) : "a" (0x8000_0003);
+ "cpuid" : "=a" (pnb[8]), "=b" (pnb[9]), "=c" (pnb[10]), "=d" (pnb[11]) : "a" (0x8000_0004);
+ }
}
else version (D_InlineAsm_X86)
{
@@ -1,4 +1,4 @@
-66ae77ac3f97a007a12738e4bc02b3bbfef99bba
+68cc18adbcdbf2a62cb85a5cb2a34236af2ab05a
The first line of this file holds the git revision number of the last
merge done from the dlang/phobos repository.
@@ -3620,7 +3620,7 @@ The number of seeds must be correspondingly increased.
static assert(!__traits(compiles, cumulativeFold!(min, max)("hello", tuple(c))));
//"Seed (dchar, dchar, dchar) does not have the correct amount of fields (should be 2)"
static assert(!__traits(compiles, cumulativeFold!(min, max)("hello", tuple(c, c, c))));
- //"Incompatable function/seed/element: all(alias pred = "a")/int/dchar"
+ //"Incompatible function/seed/element: all(alias pred = "a")/int/dchar"
static assert(!__traits(compiles, cumulativeFold!all("hello", 1)));
static assert(!__traits(compiles, cumulativeFold!(all, all)("hello", tuple(1, 1))));
}
@@ -4760,7 +4760,7 @@ private:
uint result = void;
asm pure nothrow @nogc
{
- "vmrs %0, FPSCR; and %0, %0, #0x1F;" : "=r" result;
+ "vmrs %0, FPSCR; and %0, %0, #0x1F;" : "=r" (result);
}
return result;
}
@@ -4774,7 +4774,7 @@ private:
uint result = void;
asm pure nothrow @nogc
{
- "frflags %0" : "=r" result;
+ "frflags %0" : "=r" (result);
}
return result;
}
@@ -4862,7 +4862,7 @@ private:
uint newValues = 0x0;
asm pure nothrow @nogc
{
- "fsflags %0" : : "r" newValues;
+ "fsflags %0" : : "r" (newValues);
}
}
}
@@ -5431,7 +5431,7 @@ private:
ControlState cont;
asm pure nothrow @nogc
{
- "fstcw %0" : "=m" cont;
+ "fstcw %0" : "=m" (cont);
}
return cont;
}
@@ -5440,7 +5440,7 @@ private:
ControlState cont;
asm pure nothrow @nogc
{
- "mrs %0, FPCR;" : "=r" cont;
+ "mrs %0, FPCR;" : "=r" (cont);
}
return cont;
}
@@ -5453,7 +5453,7 @@ private:
{
asm pure nothrow @nogc
{
- "vmrs %0, FPSCR" : "=r" cont;
+ "vmrs %0, FPSCR" : "=r" (cont);
}
}
return cont;
@@ -5467,7 +5467,7 @@ private:
ControlState cont;
asm pure nothrow @nogc
{
- "frcsr %0" : "=r" cont;
+ "frcsr %0" : "=r" (cont);
}
return cont;
}
@@ -5510,7 +5510,7 @@ private:
{
asm pure nothrow @nogc
{
- "fclex; fldcw %0" : : "m" newState;
+ "fclex; fldcw %0" : : "m" (newState);
}
// Also update MXCSR, SSE's control register.
@@ -5519,7 +5519,7 @@ private:
uint mxcsr;
asm pure nothrow @nogc
{
- "stmxcsr %0" : "=m" mxcsr;
+ "stmxcsr %0" : "=m" (mxcsr);
}
/* In the FPU control register, rounding mode is in bits 10 and
@@ -5534,7 +5534,7 @@ private:
asm pure nothrow @nogc
{
- "ldmxcsr %0" : : "m" mxcsr;
+ "ldmxcsr %0" : : "m" (mxcsr);
}
}
}