diff mbox series

[RS6000] PR90545, gcc.target/powerpc/fold-vec-splats-floatdouble.c fails

Message ID 20190521113129.GR6820@bubble.grove.modra.org
State New
Headers show
Series [RS6000] PR90545, gcc.target/powerpc/fold-vec-splats-floatdouble.c fails | expand

Commit Message

Alan Modra May 21, 2019, 11:31 a.m. UTC 
Bootstrapped powerpc64le-linux power8 and power9, OK to apply?

I figure a tweak to register_move_cost is better than sprinkling ?s
in instruction alternatives.

	PR 90545
	* config/rs6000/rs6000.c (rs6000_register_move_cost): Increase
	power9 direct move cost.
	* testsuite/gcc.target/powerpc/fold-vec-splats-floatdouble.c:
	Correct comments and rename functions to suit parameters.

Comments

Segher Boessenkool May 21, 2019, 1:14 p.m. UTC | #1 
Hi Alan,

On Tue, May 21, 2019 at 09:01:29PM +0930, Alan Modra wrote:
> Bootstrapped powerpc64le-linux power8 and power9, OK to apply?
> 
> I figure a tweak to register_move_cost is better than sprinkling ?s
> in instruction alternatives.

Yup.

> 	PR 90545

PR target/90545

> 	* config/rs6000/rs6000.c (rs6000_register_move_cost): Increase
> 	power9 direct move cost.
> 	* testsuite/gcc.target/powerpc/fold-vec-splats-floatdouble.c:
> 	Correct comments and rename functions to suit parameters.

Okay for trunk with that nit fixed.  Thanks!


Segher
diff mbox series

Patch

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index d27871ab907..d0e37d98ed5 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -34678,8 +34678,14 @@  rs6000_register_move_cost (machine_mode mode,
 	{
 	  if (TARGET_DIRECT_MOVE)
 	    {
+	      /* Keep the cost for direct moves above that for within
+		 a register class even if the actual processor cost is
+		 comparable.  We do this because a direct move insn
+		 can't be a nop, whereas with ideal register
+		 allocation a move within the same class might turn
+		 out to be a nop.  */
 	      if (rs6000_tune == PROCESSOR_POWER9)
-		ret = 2 * hard_regno_nregs (FIRST_GPR_REGNO, mode);
+		ret = 3 * hard_regno_nregs (FIRST_GPR_REGNO, mode);
 	      else
 		ret = 4 * hard_regno_nregs (FIRST_GPR_REGNO, mode);
 	      /* SFmode requires a conversion when moving between gprs
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-splats-floatdouble.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-splats-floatdouble.c
index c4544f1a452..3c7cc7c9a67 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-splats-floatdouble.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-splats-floatdouble.c
@@ -8,20 +8,20 @@ 
 #include <altivec.h>
 
 vector float
-test1d (float x)
+test1f (float x)
 {
   return vec_splats (x);
 }
 
 vector double
-test1f (double x)
+test1d (double x)
 {
   return vec_splats (x);
 }
 
-// float test generates the permute instruction.
+// double test generates the permute instruction.
 /* { dg-final { scan-assembler-times "xxpermdi" 1 } } */
 
-// double test generates a convert (double to single non-signalling) followed by a splat.
+// float test generates a convert (double to single non-signalling) followed by a splat.
 /* { dg-final { scan-assembler-times {\mxscvdpspn?\M} 1 } } */
 /* { dg-final { scan-assembler-times {\mvspltw\M|\mxxspltw\M} 1 } } */