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RISC-V: Add macro for ilp32e ABI. Cleanup white space.

Message ID 20181003191007.18274-1-jimw@sifive.com
State New
Headers show
Series RISC-V: Add macro for ilp32e ABI. Cleanup white space. | expand

Commit Message

Jim Wilson Oct. 3, 2018, 7:10 p.m. UTC 
Now that we officially allow -mabi=ilp32e to be used separately from
the -march=rv32e option, we need a predefined macro for it so user code
can detect the ABI.  This patches adds a __riscv_abi_rve macro for that
purpose.  While writing this, I noticed some trailing white space in
the file, and fixed that too.

This was tested with riscv{32,64}-{elf,linux} cross builds.  Also, hand
testing to verify that the new macros is defined only when it should be
defined.

Committed.

Jim

	gcc/
	* config/riscv/riscv-c.c (riscv_cpu_cpp_builtins): For ABI_ILP32E,
	also define __riscv_abi_rve.  Delete trailing white space.
---
 gcc/config/riscv/riscv-c.c | 27 +++++++++++++++------------
 1 file changed, 15 insertions(+), 12 deletions(-)
diff mbox series

Patch

diff --git a/gcc/config/riscv/riscv-c.c b/gcc/config/riscv/riscv-c.c
index 513f974d9aa..d3ecd0796e8 100644
--- a/gcc/config/riscv/riscv-c.c
+++ b/gcc/config/riscv/riscv-c.c
@@ -35,62 +35,65 @@  void
 riscv_cpu_cpp_builtins (cpp_reader *pfile)
 {
   builtin_define ("__riscv");
-  
+
   if (TARGET_RVC)
     builtin_define ("__riscv_compressed");
-  
+
   if (TARGET_RVE)
     builtin_define ("__riscv_32e");
 
   if (TARGET_ATOMIC)
     builtin_define ("__riscv_atomic");
-  
+
   if (TARGET_MUL)
     builtin_define ("__riscv_mul");
   if (TARGET_DIV)
     builtin_define ("__riscv_div");
   if (TARGET_DIV && TARGET_MUL)
     builtin_define ("__riscv_muldiv");
-  
+
   builtin_define_with_int_value ("__riscv_xlen", UNITS_PER_WORD * 8);
   if (TARGET_HARD_FLOAT)
     builtin_define_with_int_value ("__riscv_flen", UNITS_PER_FP_REG * 8);
-  
+
   if (TARGET_HARD_FLOAT && TARGET_FDIV)
     {
       builtin_define ("__riscv_fdiv");
       builtin_define ("__riscv_fsqrt");
     }
-  
+
   switch (riscv_abi)
     {
-    case ABI_ILP32:
     case ABI_ILP32E:
+      builtin_define ("__riscv_abi_rve");
+      gcc_fallthrough ();
+
+    case ABI_ILP32:
     case ABI_LP64:
       builtin_define ("__riscv_float_abi_soft");
       break;
-  
+
     case ABI_ILP32F:
     case ABI_LP64F:
       builtin_define ("__riscv_float_abi_single");
       break;
-  
+
     case ABI_ILP32D:
     case ABI_LP64D:
       builtin_define ("__riscv_float_abi_double");
       break;
     }
-  
+
   switch (riscv_cmodel)
     {
     case CM_MEDLOW:
       builtin_define ("__riscv_cmodel_medlow");
       break;
-  
+
     case CM_MEDANY:
       builtin_define ("__riscv_cmodel_medany");
       break;
-  
+
     case CM_PIC:
       builtin_define ("__riscv_cmodel_pic");
       break;